238 lines
6.2 KiB
Plaintext
238 lines
6.2 KiB
Plaintext
# $FreeBSD$
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# MAC/ART ? - they're 00:02:03:04:05:06 :(
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# ath0 chain0 EXTERNAL_LNA0: 18
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# ath0 chain1 EXTERNAL_LNA1: 19
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# These are configured as GPIO output, init low, then
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# set the GPIO 'type' AR934X_GPIO_OUT_EXT_LNA0/AR934X_GPIO_OUT_EXT_LNA1.
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# XXX There's no arge1 on this!
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# XXX RFKILL?
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# mdiobus0 on arge0
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hint.argemdio.0.at="nexus0"
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hint.argemdio.0.maddr=0x19000000
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hint.argemdio.0.msize=0x1000
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hint.argemdio.0.order=0
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# DB120 GMAC configuration
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# + AR934X_ETH_CFG_RGMII_GMAC0 (1 << 0)
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hint.ar934x_gmac.0.gmac_cfg=0x1
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# Board mac address is at 0x1f01fc00.
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# ath0: offset 0
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# ath1: offset -1
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# arge0: offset -2
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# arge1: not hooked up; doesn't matter
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hint.ar71xx.0.eeprom_mac_addr=0x1f01fc00
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hint.ar71xx.0.eeprom_mac_isascii=0
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hint.ar71xx_mac_map.0.devid=ath
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hint.ar71xx_mac_map.0.unitid=0
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hint.ar71xx_mac_map.0.offset=0
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hint.ar71xx_mac_map.0.is_local=0
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hint.ar71xx_mac_map.1.devid=ath
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hint.ar71xx_mac_map.1.unitid=1
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hint.ar71xx_mac_map.1.offset=-1
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hint.ar71xx_mac_map.1.is_local=0
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hint.ar71xx_mac_map.2.devid=arge
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hint.ar71xx_mac_map.2.unitid=0
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hint.ar71xx_mac_map.2.offset=-2
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hint.ar71xx_mac_map.2.is_local=0
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# GMAC0 here - connected to an AR8327
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hint.arswitch.0.at="mdio0"
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hint.arswitch.0.is_7240=0
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hint.arswitch.0.is_9340=0 # not the internal switch!
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hint.arswitch.0.numphys=5
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hint.arswitch.0.phy4cpu=0
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hint.arswitch.0.is_rgmii=0
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hint.arswitch.0.is_gmii=0
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# Other AR8327 configuration parameters
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# AR8327_PAD_MAC_RGMII
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hint.arswitch.0.pad.0.mode=6
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hint.arswitch.0.pad.0.txclk_delay_en=1
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hint.arswitch.0.pad.0.rxclk_delay_en=1
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# AR8327_CLK_DELAY_SEL1
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hint.arswitch.0.pad.0.txclk_delay_sel=1
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# AR8327_CLK_DELAY_SEL2
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hint.arswitch.0.pad.0.rxclk_delay_sel=2
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# XXX there's no LED management just yet!
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hint.arswitch.0.led.ctrl0=0xc737c737
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hint.arswitch.0.led.ctrl1=0x00000000
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hint.arswitch.0.led.ctrl2=0x00000000
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hint.arswitch.0.led.ctrl3=0x0030c300
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hint.arswitch.0.led.open_drain=0
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# force_link=1 is required for the rest of the parameters
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# to be configured.
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hint.arswitch.0.port.0.force_link=1
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hint.arswitch.0.port.0.speed=1000
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hint.arswitch.0.port.0.duplex=1
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hint.arswitch.0.port.0.txpause=1
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hint.arswitch.0.port.0.rxpause=1
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# XXX OpenWRT DB120 BSP doesn't have media/duplex set?
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hint.arge.0.phymask=0x0
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hint.arge.0.media=1000
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hint.arge.0.fduplex=1
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hint.arge.0.miimode=3 # RGMII
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hint.arge.0.pll_1000=0x06000000
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# mdiobus1 on arge1
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hint.argemdio.1.at="nexus0"
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hint.argemdio.1.maddr=0x1a000000
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hint.argemdio.1.msize=0x1000
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hint.argemdio.1.order=0
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# Embedded switch on the AR9344
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# mdio1 is actually created as the AR8327 internal bus; so
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# this pops up as mdio2.
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#
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# XXX TODO: there's no need for AR9344 internal switch; it isn't exposed
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hint.arswitch.1.at="mdio2"
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hint.arswitch.1.is_7240=0
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hint.arswitch.1.is_9340=1
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hint.arswitch.1.numphys=5
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hint.arswitch.1.phy4cpu=0 # phy 4 is not a "CPU port" PHY here
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hint.arswitch.1.is_rgmii=0
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hint.arswitch.1.is_gmii=1 # arge1 <-> switch PHY is GMII
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# arge1 - lock up to 1000/full
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hint.arge.1.phymask=0x0 # Nothing attached here (XXX?)
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hint.arge.1.media=1000
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hint.arge.1.fduplex=1
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hint.arge.1.miimode=1 # GMII
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# MAC for arge1 is the second 6 bytes of the ART
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# hint.arge.1.eeprommac=0x1f7f0006
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# ART calibration data mapping - for the AR934x AHB device
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hint.ar71xx_caldata.0.at="nexus0"
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hint.ar71xx_caldata.0.order=0
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# Where the ART is - last 64k in the first 8MB of flash
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hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
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hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
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# And now tell the ath(4) driver where to look!
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hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
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# ath1: it's different; it's a PCIe attached device, so
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# we instead need to teach the PCIe bridge code about it
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# (ie, the 'early pci fixup' stuff that programs the PCIe
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# host registers on the NIC) and then we teach ath where
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# to find it.
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# ath1 hint - pcie slot 0
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hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000
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hint.pcib.0.bus.0.0.0.ath_fixup_size=16384
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# ath0 - eeprom comes from here
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hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
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# flash layout:
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#
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# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART)
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# 128KiB uboot
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hint.map.0.at="flash/spi0"
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hint.map.0.start=0x00000000
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hint.map.0.end=0x00020000 # 128k u-boot
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hint.map.0.name="u-boot"
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hint.map.0.readonly=1
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# kernel
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hint.map.2.at="flash/spi0"
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hint.map.2.start=0x00020000
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hint.map.2.end="search:0x00020000:0x10000:.!/bin/sh"
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hint.map.2.name="kernel"
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hint.map.2.readonly=1
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# 1344KiB uImage
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hint.map.3.at="flash/spi0"
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hint.map.3.start="search:0x00020000:0x10000:.!/bin/sh"
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hint.map.3.end=0x007d0000
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hint.map.3.name="rootfs"
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hint.map.3.readonly=1
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# 64KiB cfg
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hint.map.4.at="flash/spi0"
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hint.map.4.start=0x007d0000
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hint.map.4.end=0x007e0000
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hint.map.4.name="cfg"
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hint.map.4.readonly=0
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# 64KiB mib0
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hint.map.5.at="flash/spi0"
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hint.map.5.start=0x007e0000
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hint.map.5.end=0x007f0000 # 64k mib0
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hint.map.5.name="mib0"
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hint.map.5.readonly=1
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# 64KiB ART
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hint.map.6.at="flash/spi0"
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hint.map.6.start=0x007f0000
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hint.map.6.end=0x00800000 # 64k ART
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hint.map.6.name="ART"
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hint.map.6.readonly=1
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# GPIO configuration
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# GPIO21 and GPIO22 - USB1 and USB2 power
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# ath0 chain0 EXTERNAL_LNA0: 18, output
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# ath0 chain1 EXTERNAL_LNA1: 19, output
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# These are the GPIO LEDs and buttons which can be software controlled.
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hint.gpio.0.pinmask=0x0063f800
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# Enable GPIO21, GPIO22 output and high - for USB power
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hint.gpio.0.pinon=0x00600000
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hint.gpio.0.func.18.gpiofunc=46
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hint.gpio.0.func.18.gpiomode=1 # output, default low
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hint.gpio.0.func.19.gpiofunc=47
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hint.gpio.0.func.19.gpiomode=1 # output, default low
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# LED QSS - 15
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# LED SYSTEM - 14
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# LED USB1 - 11
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# LED USB2 - 12
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# LED WLAN2G - 13
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# SWITCH WPS - 16
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# SWITCH RFKILL - 17
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hint.gpioled.0.at="gpiobus0"
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hint.gpioled.0.name="USB1"
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hint.gpioled.0.pins=0x0800
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hint.gpioled.0.invert=1
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hint.gpioled.1.at="gpiobus0"
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hint.gpioled.1.name="USB2"
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hint.gpioled.1.pins=0x1000
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hint.gpioled.1.invert=1
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hint.gpioled.2.at="gpiobus0"
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hint.gpioled.2.name="WLAN2G"
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hint.gpioled.2.pins=0x2000
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hint.gpioled.2.invert=1
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hint.gpioled.3.at="gpiobus0"
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hint.gpioled.3.name="SYSTEM"
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hint.gpioled.3.pins=0x4000
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hint.gpioled.3.invert=1
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hint.gpioled.4.at="gpiobus0"
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hint.gpioled.4.name="QSS"
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hint.gpioled.4.pins=0x8000
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hint.gpioled.4.invert=1
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# XXX TODO: WPS/RFKILL switch
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