a81a290f34
MSI/MSI-x interrupts are edge-triggered. If an interrupt arrives when IRQ line is masked, it will be lost and will never recover. Perform MSI_EOI always after unmask to give a chance for PHB/XICS to send an interrupt again if MSI/MSI-x pending bit is set in MSI/MSI-x BAR space. Submitted by: Wojciech Macek <wma@semihalf.org> Obtained from: Semihalf Sponsored by: IBM, QCM Technologies