71d90c04a8
to check the status property in their probe routines. Simplebus used to only instantiate its children whose status="okay" but that was improper behavior, fixed in r261352. Now that it doesn't check anymore and probes all its children; the children all have to do the check because really only the children know how to properly interpret their status property strings. Right now all existing drivers only understand "okay" versus something- that's-not-okay, so they all use the new ofw_bus_status_okay() helper.
504 lines
13 KiB
C
504 lines
13 KiB
C
/*
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* Copyright (c) 2010
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* Ben Gray <ben.r.gray@gmail.com>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Ben Gray.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* SCM - System Control Module
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*
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* Hopefully in the end this module will contain a bunch of utility functions
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* for configuring and querying the general system control registers, but for
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* now it only does pin(pad) multiplexing.
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*
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* This is different from the GPIO module in that it is used to configure the
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* pins between modules not just GPIO input/output.
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*
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* This file contains the generic top level driver, however it relies on chip
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* specific settings and therefore expects an array of ti_scm_padconf structs
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* call ti_padconf_devmap to be located somewhere in the kernel.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/resource.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "ti_scm.h"
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static struct resource_spec ti_scm_res_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Control memory window */
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{ -1, 0 }
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};
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static struct ti_scm_softc *ti_scm_sc;
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#define ti_scm_read_2(sc, reg) \
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bus_space_read_2((sc)->sc_bst, (sc)->sc_bsh, (reg))
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#define ti_scm_write_2(sc, reg, val) \
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bus_space_write_2((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
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#define ti_scm_read_4(sc, reg) \
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bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
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#define ti_scm_write_4(sc, reg, val) \
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bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
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/**
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* ti_padconf_devmap - Array of pins, should be defined one per SoC
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*
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* This array is typically defined in one of the targeted *_scm_pinumx.c
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* files and is specific to the given SoC platform. Each entry in the array
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* corresponds to an individual pin.
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*/
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extern const struct ti_scm_device ti_scm_dev;
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/**
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* ti_scm_padconf_from_name - searches the list of pads and returns entry
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* with matching ball name.
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* @ballname: the name of the ball
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*
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* RETURNS:
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* A pointer to the matching padconf or NULL if the ball wasn't found.
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*/
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static const struct ti_scm_padconf*
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ti_scm_padconf_from_name(const char *ballname)
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{
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const struct ti_scm_padconf *padconf;
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padconf = ti_scm_dev.padconf;
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while (padconf->ballname != NULL) {
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if (strcmp(ballname, padconf->ballname) == 0)
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return(padconf);
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padconf++;
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}
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return (NULL);
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}
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/**
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* ti_scm_padconf_set_internal - sets the muxmode and state for a pad/pin
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* @padconf: pointer to the pad structure
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* @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx"
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* @state: the state to put the pad/pin in, i.e. PADCONF_PIN_???
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*
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*
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* LOCKING:
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* Internally locks it's own context.
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*
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* RETURNS:
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* 0 on success.
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* EINVAL if pin requested is outside valid range or already in use.
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*/
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static int
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ti_scm_padconf_set_internal(struct ti_scm_softc *sc,
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const struct ti_scm_padconf *padconf,
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const char *muxmode, unsigned int state)
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{
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unsigned int mode;
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uint16_t reg_val;
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/* populate the new value for the PADCONF register */
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reg_val = (uint16_t)(state & ti_scm_dev.padconf_sate_mask);
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/* find the new mode requested */
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for (mode = 0; mode < 8; mode++) {
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if ((padconf->muxmodes[mode] != NULL) &&
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(strcmp(padconf->muxmodes[mode], muxmode) == 0)) {
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break;
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}
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}
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/* couldn't find the mux mode */
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if (mode >= 8) {
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printf("Invalid mode \"%s\"\n", muxmode);
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return (EINVAL);
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}
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/* set the mux mode */
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reg_val |= (uint16_t)(mode & ti_scm_dev.padconf_muxmode_mask);
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if (bootverbose)
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device_printf(sc->sc_dev, "setting internal %x for %s\n",
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reg_val, muxmode);
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/* write the register value (16-bit writes) */
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ti_scm_write_2(sc, padconf->reg_off, reg_val);
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return (0);
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}
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/**
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* ti_scm_padconf_set - sets the muxmode and state for a pad/pin
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* @padname: the name of the pad, i.e. "c12"
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* @muxmode: the name of the mode to use for the pin, i.e. "uart1_rx"
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* @state: the state to put the pad/pin in, i.e. PADCONF_PIN_???
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*
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*
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* LOCKING:
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* Internally locks it's own context.
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*
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* RETURNS:
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* 0 on success.
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* EINVAL if pin requested is outside valid range or already in use.
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*/
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int
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ti_scm_padconf_set(const char *padname, const char *muxmode, unsigned int state)
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{
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const struct ti_scm_padconf *padconf;
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if (!ti_scm_sc)
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return (ENXIO);
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/* find the pin in the devmap */
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padconf = ti_scm_padconf_from_name(padname);
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if (padconf == NULL)
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return (EINVAL);
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return (ti_scm_padconf_set_internal(ti_scm_sc, padconf, muxmode, state));
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}
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/**
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* ti_scm_padconf_get - gets the muxmode and state for a pad/pin
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* @padname: the name of the pad, i.e. "c12"
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* @muxmode: upon return will contain the name of the muxmode of the pin
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* @state: upon return will contain the state of the pad/pin
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*
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*
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* LOCKING:
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* Internally locks it's own context.
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*
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* RETURNS:
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* 0 on success.
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* EINVAL if pin requested is outside valid range or already in use.
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*/
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int
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ti_scm_padconf_get(const char *padname, const char **muxmode,
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unsigned int *state)
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{
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const struct ti_scm_padconf *padconf;
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uint16_t reg_val;
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if (!ti_scm_sc)
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return (ENXIO);
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/* find the pin in the devmap */
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padconf = ti_scm_padconf_from_name(padname);
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if (padconf == NULL)
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return (EINVAL);
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/* read the register value (16-bit reads) */
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reg_val = ti_scm_read_2(ti_scm_sc, padconf->reg_off);
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/* save the state */
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if (state)
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*state = (reg_val & ti_scm_dev.padconf_sate_mask);
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/* save the mode */
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if (muxmode)
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*muxmode = padconf->muxmodes[(reg_val & ti_scm_dev.padconf_muxmode_mask)];
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return (0);
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}
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/**
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* ti_scm_padconf_set_gpiomode - converts a pad to GPIO mode.
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* @gpio: the GPIO pin number (0-195)
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* @state: the state to put the pad/pin in, i.e. PADCONF_PIN_???
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*
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*
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*
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* LOCKING:
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* Internally locks it's own context.
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*
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* RETURNS:
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* 0 on success.
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* EINVAL if pin requested is outside valid range or already in use.
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*/
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int
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ti_scm_padconf_set_gpiomode(uint32_t gpio, unsigned int state)
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{
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const struct ti_scm_padconf *padconf;
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uint16_t reg_val;
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if (!ti_scm_sc)
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return (ENXIO);
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/* find the gpio pin in the padconf array */
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padconf = ti_scm_dev.padconf;
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while (padconf->ballname != NULL) {
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if (padconf->gpio_pin == gpio)
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break;
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padconf++;
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}
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if (padconf->ballname == NULL)
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return (EINVAL);
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/* populate the new value for the PADCONF register */
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reg_val = (uint16_t)(state & ti_scm_dev.padconf_sate_mask);
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/* set the mux mode */
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reg_val |= (uint16_t)(padconf->gpio_mode & ti_scm_dev.padconf_muxmode_mask);
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/* write the register value (16-bit writes) */
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ti_scm_write_2(ti_scm_sc, padconf->reg_off, reg_val);
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return (0);
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}
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/**
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* ti_scm_padconf_get_gpiomode - gets the current GPIO mode of the pin
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* @gpio: the GPIO pin number (0-195)
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* @state: upon return will contain the state
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*
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*
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*
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* LOCKING:
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* Internally locks it's own context.
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*
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* RETURNS:
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* 0 on success.
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* EINVAL if pin requested is outside valid range or not configured as GPIO.
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*/
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int
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ti_scm_padconf_get_gpiomode(uint32_t gpio, unsigned int *state)
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{
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const struct ti_scm_padconf *padconf;
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uint16_t reg_val;
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if (!ti_scm_sc)
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return (ENXIO);
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/* find the gpio pin in the padconf array */
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padconf = ti_scm_dev.padconf;
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while (padconf->ballname != NULL) {
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if (padconf->gpio_pin == gpio)
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break;
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padconf++;
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}
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if (padconf->ballname == NULL)
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return (EINVAL);
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/* read the current register settings */
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reg_val = ti_scm_read_2(ti_scm_sc, padconf->reg_off);
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/* check to make sure the pins is configured as GPIO in the first state */
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if ((reg_val & ti_scm_dev.padconf_muxmode_mask) != padconf->gpio_mode)
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return (EINVAL);
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/* read and store the reset of the state, i.e. pull-up, pull-down, etc */
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if (state)
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*state = (reg_val & ti_scm_dev.padconf_sate_mask);
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return (0);
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}
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/**
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* ti_scm_padconf_init_from_hints - processes the hints for padconf
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* @sc: the driver soft context
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*
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*
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*
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* LOCKING:
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* Internally locks it's own context.
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*
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* RETURNS:
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* 0 on success.
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* EINVAL if pin requested is outside valid range or already in use.
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*/
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static int
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ti_scm_padconf_init_from_fdt(struct ti_scm_softc *sc)
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{
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const struct ti_scm_padconf *padconf;
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const struct ti_scm_padstate *padstates;
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int err;
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phandle_t node;
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int len;
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char *fdt_pad_config;
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int i;
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char *padname, *muxname, *padstate;
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node = ofw_bus_get_node(sc->sc_dev);
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len = OF_getproplen(node, "scm-pad-config");
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OF_getprop_alloc(node, "scm-pad-config", 1, (void **)&fdt_pad_config);
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i = len;
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while (i > 0) {
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padname = fdt_pad_config;
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fdt_pad_config += strlen(padname) + 1;
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i -= strlen(padname) + 1;
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if (i <= 0)
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break;
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muxname = fdt_pad_config;
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fdt_pad_config += strlen(muxname) + 1;
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i -= strlen(muxname) + 1;
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if (i <= 0)
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break;
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padstate = fdt_pad_config;
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fdt_pad_config += strlen(padstate) + 1;
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i -= strlen(padstate) + 1;
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if (i < 0)
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break;
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padconf = ti_scm_dev.padconf;
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while (padconf->ballname != NULL) {
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if (strcmp(padconf->ballname, padname) == 0) {
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padstates = ti_scm_dev.padstate;
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err = 1;
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while (padstates->state != NULL) {
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if (strcmp(padstates->state, padstate) == 0) {
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err = ti_scm_padconf_set_internal(sc,
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padconf, muxname, padstates->reg);
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}
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padstates++;
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}
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if (err)
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device_printf(sc->sc_dev,
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"err: failed to configure "
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"pin \"%s\" as \"%s\"\n",
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padconf->ballname,
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muxname);
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}
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padconf++;
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}
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}
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return (0);
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}
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/*
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* Device part of OMAP SCM driver
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*/
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static int
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ti_scm_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "ti,scm"))
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return (ENXIO);
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device_set_desc(dev, "TI Control Module");
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return (BUS_PROBE_DEFAULT);
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}
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/**
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* ti_scm_attach - attaches the timer to the simplebus
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* @dev: new device
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*
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* Reserves memory and interrupt resources, stores the softc structure
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* globally and registers both the timecount and eventtimer objects.
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*
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* RETURNS
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* Zero on sucess or ENXIO if an error occuried.
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*/
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static int
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ti_scm_attach(device_t dev)
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{
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struct ti_scm_softc *sc = device_get_softc(dev);
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if (ti_scm_sc)
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return (ENXIO);
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sc->sc_dev = dev;
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if (bus_alloc_resources(dev, ti_scm_res_spec, sc->sc_res)) {
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device_printf(dev, "could not allocate resources\n");
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return (ENXIO);
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}
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/* Global timer interface */
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sc->sc_bst = rman_get_bustag(sc->sc_res[0]);
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sc->sc_bsh = rman_get_bushandle(sc->sc_res[0]);
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ti_scm_sc = sc;
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ti_scm_padconf_init_from_fdt(sc);
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return (0);
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}
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int
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ti_scm_reg_read_4(uint32_t reg, uint32_t *val)
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{
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if (!ti_scm_sc)
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return (ENXIO);
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*val = ti_scm_read_4(ti_scm_sc, reg);
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return (0);
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}
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int
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ti_scm_reg_write_4(uint32_t reg, uint32_t val)
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{
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if (!ti_scm_sc)
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return (ENXIO);
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ti_scm_write_4(ti_scm_sc, reg, val);
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return (0);
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}
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static device_method_t ti_scm_methods[] = {
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DEVMETHOD(device_probe, ti_scm_probe),
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DEVMETHOD(device_attach, ti_scm_attach),
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{ 0, 0 }
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};
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static driver_t ti_scm_driver = {
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"ti_scm",
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ti_scm_methods,
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sizeof(struct ti_scm_softc),
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};
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static devclass_t ti_scm_devclass;
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DRIVER_MODULE(ti_scm, simplebus, ti_scm_driver, ti_scm_devclass, 0, 0);
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