9ea9bafe68
front-end and the LSI64854 and NCR53C9x code in case one of these functions fails. Add detach functions to these parts and make esp(4) detachable. - Revert rev. 1.7 of esp_sbus.c, since rev. 1.34 of sbus.c the clockfreq IVAR defaults to the per-child values. - Merge ncr53c9x.c rev. 1.111 from NetBSD (partial): On reset, clear state flags and the msgout queue. In NetBSD code to notify the upper layer (i.e. CAM in FreeBSD) on reset was also added with this revision. This is believed to be not necessary in FreeBSD and was not merged. This makes ncr53c9x.c to be in sync with NetBSD up to rev. 1.114. - Conditionalize the LSI64854 support on sbus(4) only instead of sbus(4) and esp(4) as it's also required for the 'dma', 'espdma' and 'ledma' busses/devices as well as the 'SUNW,bpp' device (printer port) which all hang off of sbus(4). - Add a driver for the 'dma', 'espdma' and 'ledma' (pseudo-)busses/ devices. These busses and devices actually represent the LSI64854 DMA engines for the ESP SCSI and LANCE Ethernet controllers found on the SBus of Ultra 1 and SBus add-on cards. With 'espdma' and 'ledma' the 'esp' and 'le' devices hang off of the respective DMA bus instead of directly from the SBus. The 'dma' devices are either also used in this manner or on some add-on cards also as a companion device to an 'esp' device which also hangs off directly from the SBus. With the latter variant it's a bit tricky to glue the DMA engine to the core logic of the respective 'esp' device. With rev. 1.35 of sbus.c we are however guaranteed that such a 'dma' device is probed before the respective 'esp' device which simplifies things a lot. [1] - In the esp(4) SBus front-end read the part-unique ID code of Fast-SCSI capable chips the right way. This fixes erroneously detecting some chips as FAS366 when in fact they are not. Add explicit checks for the FAS100A, FAS216 and FAS236 variants instead treating all of these as ESP200. That way we can correctly set the respective Fast-SCSI config bits instead of driving them out of specs. This includes adding the FAS100A and FAS236 variants to the NCR53C9x core code. We probably still subsume some chip variants as ESP200 while in fact they are another variant which however shouldn't really matter as this will only happen when these chips are driven at 25MHz or less which implies not being able to run Fast-SCSI. [3] - Add a workaround to the NCR53C9x interrupt handler which ignores the stray interrupt generated by FAS100A when doing path inquiry during boot and which otherwiese would trigger a panic. - Add support for the 'esp' devices hanging off of a 'dma' or 'espdma' busses or which are companions of 'dma' devices to esp(4). In case of the variants that hang off of a DMA device this is a bit hackish as esp(4) then directly uses the softc of the respective parent to talk to the DMA engine. It might make sense to add an interface for this in order to implement this in a cleaner way however it's not yet clear how the requirements for the LANCE Ethernet controllers are and the hack works for now. [2] This effectively adds support for the onboard SCSI controller in Ultra 1 as well as most of the ESP-based SBus add-on cards to esp(4). With this the code for supporting the Performance Technologies SBS430 SBus SCSI add-on cards is also largely in place the remaining bits were however omitted as it's unclear from the NetBSD how to couple the DMA engine and the core logic together for these cards. Obtained from: OpenBSD [1] Obtained from: NetBSD [2] Clue from: BSD/OS [3] Reviewed by: scottl (earlier version) Tested with: FSBE/S add-on card (FAS236), SSHA add-on card (ESP100A), Ultra 1 (onboard FAS100A), Ultra 2 (onboard FAS366)
115 lines
3.9 KiB
C
115 lines
3.9 KiB
C
/* $NetBSD: lsi64854var.h,v 1.6 2005/02/04 02:10:36 perry Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* $FreeBSD$ */
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struct lsi64854_softc {
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device_t sc_dev;
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int sc_rid;
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struct resource *sc_res;
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bus_space_handle_t sc_regh;
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bus_space_tag_t sc_regt;
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u_int sc_rev; /* revision */
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int sc_burst; /* max suported burst size */
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int sc_channel;
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#define L64854_CHANNEL_SCSI 1
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#define L64854_CHANNEL_ENET 2
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#define L64854_CHANNEL_PP 3
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void *sc_client;
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int sc_active; /* DMA active ? */
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bus_dmamap_t sc_dmamap; /* DMA map for bus_dma_* */
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bus_dma_tag_t sc_parent_dmat;
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bus_dma_tag_t sc_buffer_dmat;
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int sc_datain;
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size_t sc_dmasize;
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caddr_t *sc_dmaaddr;
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size_t *sc_dmalen;
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void (*reset)(struct lsi64854_softc *);/* reset routine */
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int (*setup)(struct lsi64854_softc *, caddr_t *, size_t *,
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int, size_t *); /* DMA setup */
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int (*intr)(void *); /* interrupt handler */
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driver_intr_t *sc_intrchain; /* next handler in intr chain */
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void *sc_intrchainarg; /* arg for next intr handler */
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u_int sc_dmactl;
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};
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#define L64854_GCSR(sc) \
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(bus_space_read_4((sc)->sc_regt, (sc)->sc_regh, L64854_REG_CSR))
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#define L64854_SCSR(sc, csr) \
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bus_space_write_4((sc)->sc_regt, (sc)->sc_regh, L64854_REG_CSR, csr)
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/*
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* DMA engine interface functions.
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*/
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#define DMA_RESET(sc) (((sc)->reset)(sc))
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#define DMA_INTR(sc) (((sc)->intr)(sc))
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#define DMA_SETUP(sc, a, l, d, s) (((sc)->setup)(sc, a, l, d, s))
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#define DMA_ISACTIVE(sc) ((sc)->sc_active)
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#define DMA_ENINTR(sc) do { \
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uint32_t csr = L64854_GCSR(sc); \
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csr |= L64854_INT_EN; \
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L64854_SCSR(sc, csr); \
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} while (0)
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#define DMA_ISINTR(sc) (L64854_GCSR(sc) & (D_INT_PEND|D_ERR_PEND))
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#define DMA_GO(sc) do { \
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uint32_t csr = L64854_GCSR(sc); \
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csr |= D_EN_DMA; \
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L64854_SCSR(sc, csr); \
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sc->sc_active = 1; \
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} while (0)
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int lsi64854_attach(struct lsi64854_softc *);
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int lsi64854_detach(struct lsi64854_softc *);
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int lsi64854_scsi_intr(void *);
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int lsi64854_enet_intr(void *);
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int lsi64854_pp_intr(void *);
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