c1e22c8ece
available on the aml8726-m6 (and later) SoC which allows for lower speeds. Differential Revision: https://reviews.freebsd.org/D2433 Submitted by: John Wehle
108 lines
4.1 KiB
C
108 lines
4.1 KiB
C
/*-
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* Copyright 2013-2015 John Wehle <john@feith.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _ARM_AMLOGIC_AML8726_UART_H
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#define _ARM_AMLOGIC_AML8726_UART_H
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#define AML_UART_WFIFO_REG 0
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#define AML_UART_RFIFO_REG 4
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#define AML_UART_CONTROL_REG 8
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#define AML_UART_CONTROL_TX_INT_EN (1 << 28)
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#define AML_UART_CONTROL_RX_INT_EN (1 << 27)
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#define AML_UART_CONTROL_CLR_ERR (1 << 24)
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#define AML_UART_CONTROL_RX_RST (1 << 23)
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#define AML_UART_CONTROL_TX_RST (1 << 22)
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#define AML_UART_CONTROL_DB_MASK (3 << 20)
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#define AML_UART_CONTROL_8_DB (0 << 20)
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#define AML_UART_CONTROL_7_DB (1 << 20)
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#define AML_UART_CONTROL_6_DB (2 << 20)
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#define AML_UART_CONTROL_5_DB (3 << 20)
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#define AML_UART_CONTROL_P_MASK (3 << 18)
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#define AML_UART_CONTROL_P_EN (1 << 19)
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#define AML_UART_CONTROL_P_EVEN (0 << 18)
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#define AML_UART_CONTROL_P_ODD (1 << 18)
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#define AML_UART_CONTROL_SB_MASK (3 << 16)
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#define AML_UART_CONTROL_1_SB (0 << 16)
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#define AML_UART_CONTROL_2_SB (1 << 16)
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#define AML_UART_CONTROL_TWO_WIRE_EN (1 << 15)
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#define AML_UART_CONTROL_RX_EN (1 << 13)
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#define AML_UART_CONTROL_TX_EN (1 << 12)
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#define AML_UART_CONTROL_BAUD_MASK 0xfff
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#define AML_UART_CONTROL_BAUD_WIDTH 12
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#define AML_UART_STATUS_REG 12
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#define AML_UART_STATUS_RECV_BUSY (1 << 26)
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#define AML_UART_STATUS_XMIT_BUSY (1 << 25)
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#define AML_UART_STATUS_RX_FIFO_OVERFLOW (1 << 24)
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#define AML_UART_STATUS_TX_FIFO_EMPTY (1 << 22)
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#define AML_UART_STATUS_TX_FIFO_FULL (1 << 21)
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#define AML_UART_STATUS_RX_FIFO_EMPTY (1 << 20)
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#define AML_UART_STATUS_RX_FIFO_FULL (1 << 19)
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#define AML_UART_STATUS_TX_FIFO_WRITE_ERR (1 << 18)
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#define AML_UART_STATUS_FRAME_ERR (1 << 17)
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#define AML_UART_STATUS_PARITY_ERR (1 << 16)
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#define AML_UART_STATUS_TX_FIFO_CNT_MASK (0x7f << 8)
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#define AML_UART_STATUS_TX_FIFO_CNT_SHIFT 8
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#define AML_UART_STATUS_RX_FIFO_CNT_MASK (0x7f << 0)
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#define AML_UART_STATUS_RX_FIFO_CNT_SHIFT 0
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#define AML_UART_MISC_REG 16
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#define AML_UART_MISC_OLD_RX_BAUD (1 << 30)
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#define AML_UART_MISC_BAUD_EXT_MASK (0xf << 20)
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#define AML_UART_MISC_BAUD_EXT_SHIFT 20
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/*
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* The documentation appears to be incorrect as the
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* IRQ is actually generated when TX FIFO count is
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* * equal to * or less than the selected threshold.
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*/
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#define AML_UART_MISC_XMIT_IRQ_CNT_MASK (0xff << 8)
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#define AML_UART_MISC_XMIT_IRQ_CNT_SHIFT 8
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/*
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* The documentation appears to be incorrect as the
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* IRQ is actually generated when RX FIFO count is
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* * equal to * or greater than the selected threshold.
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*/
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#define AML_UART_MISC_RECV_IRQ_CNT_MASK 0xff
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#define AML_UART_MISC_RECV_IRQ_CNT_SHIFT 0
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/*
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* The new baud rate register is available on the
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* aml8726-m6 and later.
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*/
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#define AML_UART_NEW_BAUD_REG 20
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#define AML_UART_NEW_BAUD_USE_XTAL_CLK (1 << 24)
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#define AML_UART_NEW_BAUD_RATE_EN (1 << 23)
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#define AML_UART_NEW_BAUD_RATE_MASK (0x7fffff << 0)
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#define AML_UART_NEW_BAUD_RATE_SHIFT 0
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#endif /* _ARM_AMLOGIC_AML8726_UART_H */
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