eec2e836e9
bit separate from ipending, since this is simpler and/or necessary for SMP and may even be better for UP. Reviewed by: alc, luoqi, tegge
169 lines
4.7 KiB
ArmAsm
169 lines
4.7 KiB
ArmAsm
/*-
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* Copyright (c) 1989, 1990 William F. Jolitz.
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: icu_ipl.s,v 1.4 1998/08/11 15:08:12 bde Exp $
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*/
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.data
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ALIGN_DATA
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vec:
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.long vec0, vec1, vec2, vec3, vec4, vec5, vec6, vec7
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.long vec8, vec9, vec10, vec11, vec12, vec13, vec14, vec15
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/* interrupt mask enable (all h/w off) */
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.globl _imen
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_imen: .long HWI_MASK
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/*
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*
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*/
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.text
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SUPERALIGN_TEXT
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/*
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* Interrupt priority mechanism
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* -- soft splXX masks with group mechanism (cpl)
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* -- h/w masks for currently active or unused interrupts (imen)
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* -- ipending = active interrupts currently masked by cpl
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*/
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ENTRY(splz)
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/*
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* The caller has restored cpl and checked that (ipending & ~cpl)
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* is nonzero. We have to repeat the check since if there is an
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* interrupt while we're looking, _doreti processing for the
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* interrupt will handle all the unmasked pending interrupts
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* because we restored early. We're repeating the calculation
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* of (ipending & ~cpl) anyway so that the caller doesn't have
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* to pass it, so this only costs one "jne". "bsfl %ecx,%ecx"
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* is undefined when %ecx is 0 so we can't rely on the secondary
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* btrl tests.
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*/
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movl _cpl,%eax
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splz_next:
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/*
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* We don't need any locking here. (ipending & ~cpl) cannot grow
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* while we're looking at it - any interrupt will shrink it to 0.
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*/
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movl %eax,%ecx
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notl %ecx
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andl _ipending,%ecx
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jne splz_unpend
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ret
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ALIGN_TEXT
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splz_unpend:
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bsfl %ecx,%ecx
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btrl %ecx,_ipending
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jnc splz_next
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cmpl $NHWI,%ecx
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jae splz_swi
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/*
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* We would prefer to call the intr handler directly here but that
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* doesn't work for badly behaved handlers that want the interrupt
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* frame. Also, there's a problem determining the unit number.
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* We should change the interface so that the unit number is not
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* determined at config time.
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*/
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jmp *vec(,%ecx,4)
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ALIGN_TEXT
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splz_swi:
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pushl %eax
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orl imasks(,%ecx,4),%eax
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movl %eax,_cpl
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call *_ihandlers(,%ecx,4)
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popl %eax
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movl %eax,_cpl
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jmp splz_next
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/*
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* Fake clock interrupt(s) so that they appear to come from our caller instead
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* of from here, so that system profiling works.
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* XXX do this more generally (for all vectors; look up the C entry point).
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* XXX frame bogusness stops us from just jumping to the C entry point.
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*/
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ALIGN_TEXT
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vec0:
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popl %eax /* return address */
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pushfl
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pushl $KCSEL
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pushl %eax
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cli
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MEXITCOUNT
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jmp _Xintr0 /* XXX might need _Xfastintr0 */
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#ifndef PC98
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ALIGN_TEXT
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vec8:
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popl %eax
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pushfl
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pushl $KCSEL
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pushl %eax
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cli
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MEXITCOUNT
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jmp _Xintr8 /* XXX might need _Xfastintr8 */
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#endif /* PC98 */
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/*
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* The 'generic' vector stubs.
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*/
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#define BUILD_VEC(irq_num) \
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ALIGN_TEXT ; \
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__CONCAT(vec,irq_num): ; \
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int $ICU_OFFSET + (irq_num) ; \
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ret
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BUILD_VEC(1)
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BUILD_VEC(2)
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BUILD_VEC(3)
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BUILD_VEC(4)
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BUILD_VEC(5)
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BUILD_VEC(6)
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BUILD_VEC(7)
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#ifdef PC98
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BUILD_VEC(8)
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#endif
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BUILD_VEC(9)
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BUILD_VEC(10)
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BUILD_VEC(11)
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BUILD_VEC(12)
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BUILD_VEC(13)
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BUILD_VEC(14)
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BUILD_VEC(15)
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