freebsd-skq/sys/riscv
Mitchell Horne f7cc0eae7e riscv: small counter(9) improvements
Prefer atomics to critical section. This reduces the cost of the
increment operation and removes the possibility of it being interrupted
by counter_u64_zero().

Use CPU_FOREACH() macro to skip absent CPUs.

Replace hand-rolled address calculation with zpcpu_get().

Reviewed by:	markj
Differential Revision:	https://reviews.freebsd.org/D27536
2020-12-11 20:01:45 +00:00
..
conf RISC-V LINT kernel config 2020-10-09 14:45:41 +00:00
include riscv: small counter(9) improvements 2020-12-11 20:01:45 +00:00
riscv riscv: handle debug.debugger_on_trap for fatal page faults 2020-12-10 22:20:20 +00:00
sifive riscv/sifive: add FE310 Always-on driver 2020-04-02 00:33:15 +00:00