455 lines
10 KiB
C
455 lines
10 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2009-2016 Solarflare Communications Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are
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* those of the authors and should not be interpreted as representing official
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* policies, either expressed or implied, of the FreeBSD Project.
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*
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* $FreeBSD$
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*/
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#ifndef _SYS_SIENA_IMPL_H
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#define _SYS_SIENA_IMPL_H
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#include "efx.h"
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#include "efx_regs.h"
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#include "efx_mcdi.h"
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#include "siena_flash.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef EFX_TXQ_DC_SIZE
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#define EFX_TXQ_DC_SIZE 1 /* 16 descriptors */
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#endif
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#ifndef EFX_RXQ_DC_SIZE
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#define EFX_RXQ_DC_SIZE 3 /* 64 descriptors */
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#endif
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#define EFX_TXQ_DC_NDESCS(_dcsize) (8 << (_dcsize))
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#define SIENA_NVRAM_CHUNK 0x80
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extern __checkReturn efx_rc_t
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siena_nic_probe(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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siena_nic_reset(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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siena_nic_init(
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__in efx_nic_t *enp);
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#if EFSYS_OPT_DIAG
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extern efx_sram_pattern_fn_t __efx_sram_pattern_fns[];
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typedef struct siena_register_set_s {
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unsigned int address;
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unsigned int step;
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unsigned int rows;
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efx_oword_t mask;
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} siena_register_set_t;
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extern __checkReturn efx_rc_t
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siena_nic_register_test(
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__in efx_nic_t *enp);
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#endif /* EFSYS_OPT_DIAG */
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extern void
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siena_nic_fini(
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__in efx_nic_t *enp);
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extern void
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siena_nic_unprobe(
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__in efx_nic_t *enp);
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#define SIENA_SRAM_ROWS 0x12000
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extern void
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siena_sram_init(
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__in efx_nic_t *enp);
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#if EFSYS_OPT_DIAG
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extern __checkReturn efx_rc_t
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siena_sram_test(
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__in efx_nic_t *enp,
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__in efx_sram_pattern_fn_t func);
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#endif /* EFSYS_OPT_DIAG */
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#if EFSYS_OPT_MCDI
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extern __checkReturn efx_rc_t
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siena_mcdi_init(
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__in efx_nic_t *enp,
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__in const efx_mcdi_transport_t *mtp);
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extern void
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siena_mcdi_send_request(
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__in efx_nic_t *enp,
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__in_bcount(hdr_len) void *hdrp,
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__in size_t hdr_len,
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__in_bcount(sdu_len) void *sdup,
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__in size_t sdu_len);
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extern __checkReturn boolean_t
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siena_mcdi_poll_response(
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__in efx_nic_t *enp);
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extern void
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siena_mcdi_read_response(
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__in efx_nic_t *enp,
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__out_bcount(length) void *bufferp,
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__in size_t offset,
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__in size_t length);
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extern efx_rc_t
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siena_mcdi_poll_reboot(
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__in efx_nic_t *enp);
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extern void
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siena_mcdi_fini(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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siena_mcdi_feature_supported(
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__in efx_nic_t *enp,
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__in efx_mcdi_feature_id_t id,
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__out boolean_t *supportedp);
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extern void
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siena_mcdi_get_timeout(
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__in efx_nic_t *enp,
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__in efx_mcdi_req_t *emrp,
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__out uint32_t *timeoutp);
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#endif /* EFSYS_OPT_MCDI */
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#if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
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extern __checkReturn efx_rc_t
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siena_nvram_partn_lock(
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__in efx_nic_t *enp,
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__in uint32_t partn);
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extern __checkReturn efx_rc_t
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siena_nvram_partn_unlock(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__out_opt uint32_t *verify_resultp);
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extern __checkReturn efx_rc_t
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siena_nvram_get_dynamic_cfg(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in boolean_t vpd,
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__out siena_mc_dynamic_config_hdr_t **dcfgp,
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__out size_t *sizep);
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#endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
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#if EFSYS_OPT_NVRAM
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#if EFSYS_OPT_DIAG
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extern __checkReturn efx_rc_t
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siena_nvram_test(
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__in efx_nic_t *enp);
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#endif /* EFSYS_OPT_DIAG */
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extern __checkReturn efx_rc_t
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siena_nvram_get_subtype(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__out uint32_t *subtypep);
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extern __checkReturn efx_rc_t
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siena_nvram_type_to_partn(
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__in efx_nic_t *enp,
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__in efx_nvram_type_t type,
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__out uint32_t *partnp);
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extern __checkReturn efx_rc_t
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siena_nvram_partn_size(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__out size_t *sizep);
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extern __checkReturn efx_rc_t
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siena_nvram_partn_rw_start(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__out size_t *chunk_sizep);
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extern __checkReturn efx_rc_t
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siena_nvram_partn_read(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in unsigned int offset,
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__out_bcount(size) caddr_t data,
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__in size_t size);
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extern __checkReturn efx_rc_t
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siena_nvram_partn_erase(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in unsigned int offset,
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__in size_t size);
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extern __checkReturn efx_rc_t
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siena_nvram_partn_write(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in unsigned int offset,
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__out_bcount(size) caddr_t data,
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__in size_t size);
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extern __checkReturn efx_rc_t
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siena_nvram_partn_rw_finish(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__out_opt uint32_t *verify_resultp);
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extern __checkReturn efx_rc_t
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siena_nvram_partn_get_version(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__out uint32_t *subtypep,
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__out_ecount(4) uint16_t version[4]);
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extern __checkReturn efx_rc_t
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siena_nvram_partn_set_version(
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__in efx_nic_t *enp,
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__in uint32_t partn,
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__in_ecount(4) uint16_t version[4]);
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#endif /* EFSYS_OPT_NVRAM */
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#if EFSYS_OPT_VPD
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extern __checkReturn efx_rc_t
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siena_vpd_init(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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siena_vpd_size(
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__in efx_nic_t *enp,
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__out size_t *sizep);
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extern __checkReturn efx_rc_t
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siena_vpd_read(
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__in efx_nic_t *enp,
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__out_bcount(size) caddr_t data,
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__in size_t size);
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extern __checkReturn efx_rc_t
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siena_vpd_verify(
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__in efx_nic_t *enp,
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__in_bcount(size) caddr_t data,
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__in size_t size);
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extern __checkReturn efx_rc_t
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siena_vpd_reinit(
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__in efx_nic_t *enp,
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__in_bcount(size) caddr_t data,
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__in size_t size);
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extern __checkReturn efx_rc_t
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siena_vpd_get(
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__in efx_nic_t *enp,
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__in_bcount(size) caddr_t data,
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__in size_t size,
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__inout efx_vpd_value_t *evvp);
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extern __checkReturn efx_rc_t
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siena_vpd_set(
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__in efx_nic_t *enp,
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__in_bcount(size) caddr_t data,
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__in size_t size,
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__in efx_vpd_value_t *evvp);
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extern __checkReturn efx_rc_t
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siena_vpd_next(
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__in efx_nic_t *enp,
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__in_bcount(size) caddr_t data,
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__in size_t size,
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__out efx_vpd_value_t *evvp,
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__inout unsigned int *contp);
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extern __checkReturn efx_rc_t
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siena_vpd_write(
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__in efx_nic_t *enp,
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__in_bcount(size) caddr_t data,
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__in size_t size);
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extern void
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siena_vpd_fini(
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__in efx_nic_t *enp);
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#endif /* EFSYS_OPT_VPD */
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typedef struct siena_link_state_s {
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uint32_t sls_adv_cap_mask;
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uint32_t sls_lp_cap_mask;
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unsigned int sls_fcntl;
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efx_link_mode_t sls_link_mode;
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#if EFSYS_OPT_LOOPBACK
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efx_loopback_type_t sls_loopback;
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#endif
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boolean_t sls_mac_up;
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} siena_link_state_t;
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extern void
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siena_phy_link_ev(
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__in efx_nic_t *enp,
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__in efx_qword_t *eqp,
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__out efx_link_mode_t *link_modep);
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extern __checkReturn efx_rc_t
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siena_phy_get_link(
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__in efx_nic_t *enp,
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__out siena_link_state_t *slsp);
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extern __checkReturn efx_rc_t
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siena_phy_power(
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__in efx_nic_t *enp,
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__in boolean_t on);
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extern __checkReturn efx_rc_t
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siena_phy_reconfigure(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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siena_phy_verify(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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siena_phy_oui_get(
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__in efx_nic_t *enp,
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__out uint32_t *ouip);
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#if EFSYS_OPT_PHY_STATS
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extern void
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siena_phy_decode_stats(
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__in efx_nic_t *enp,
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__in uint32_t vmask,
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__in_opt efsys_mem_t *esmp,
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__out_opt uint64_t *smaskp,
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__inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat);
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extern __checkReturn efx_rc_t
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siena_phy_stats_update(
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__in efx_nic_t *enp,
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__in efsys_mem_t *esmp,
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__inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
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#endif /* EFSYS_OPT_PHY_STATS */
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#if EFSYS_OPT_BIST
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extern __checkReturn efx_rc_t
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siena_phy_bist_start(
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__in efx_nic_t *enp,
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__in efx_bist_type_t type);
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extern __checkReturn efx_rc_t
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siena_phy_bist_poll(
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__in efx_nic_t *enp,
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__in efx_bist_type_t type,
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__out efx_bist_result_t *resultp,
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__out_opt __drv_when(count > 0, __notnull)
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uint32_t *value_maskp,
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__out_ecount_opt(count) __drv_when(count > 0, __notnull)
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unsigned long *valuesp,
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__in size_t count);
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extern void
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siena_phy_bist_stop(
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__in efx_nic_t *enp,
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__in efx_bist_type_t type);
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#endif /* EFSYS_OPT_BIST */
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extern __checkReturn efx_rc_t
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siena_mac_poll(
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__in efx_nic_t *enp,
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__out efx_link_mode_t *link_modep);
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extern __checkReturn efx_rc_t
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siena_mac_up(
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__in efx_nic_t *enp,
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__out boolean_t *mac_upp);
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extern __checkReturn efx_rc_t
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siena_mac_reconfigure(
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__in efx_nic_t *enp);
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extern __checkReturn efx_rc_t
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siena_mac_pdu_get(
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__in efx_nic_t *enp,
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__out size_t *pdu);
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#if EFSYS_OPT_LOOPBACK
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extern __checkReturn efx_rc_t
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siena_mac_loopback_set(
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__in efx_nic_t *enp,
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__in efx_link_mode_t link_mode,
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__in efx_loopback_type_t loopback_type);
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#endif /* EFSYS_OPT_LOOPBACK */
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#if EFSYS_OPT_MAC_STATS
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extern __checkReturn efx_rc_t
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siena_mac_stats_get_mask(
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__in efx_nic_t *enp,
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__inout_bcount(mask_size) uint32_t *maskp,
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__in size_t mask_size);
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extern __checkReturn efx_rc_t
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siena_mac_stats_update(
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__in efx_nic_t *enp,
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__in efsys_mem_t *esmp,
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__inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
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__inout_opt uint32_t *generationp);
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#endif /* EFSYS_OPT_MAC_STATS */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SYS_SIENA_IMPL_H */
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