0eab9692b5
shared code infrastructure that is family specific and modular. There is also support for our latest gigabit nic, the 82575 that is MSI/X and multiqueue capable. The new shared code changes some interfaces to the core code but testing at Intel has been going on for months, it is fairly stable. I have attempted to be careful in retaining any fixes that CURRENT had and we did not, I apologize in advance if any thing gets clobbered, I'm sure I'll hear about it :) Approved by pdeuskar
94 lines
4.7 KiB
C
94 lines
4.7 KiB
C
/*******************************************************************************
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Copyright (c) 2001-2007, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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$FreeBSD$
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#ifndef _E1000_MAC_H_
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#define _E1000_MAC_H_
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#include "e1000_api.h"
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/* Functions that should not be called directly from drivers but can be used
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* by other files in this 'shared code'
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*/
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s32 e1000_blink_led_generic(struct e1000_hw *hw);
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s32 e1000_check_for_copper_link_generic(struct e1000_hw *hw);
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s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw);
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s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw);
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s32 e1000_cleanup_led_generic(struct e1000_hw *hw);
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s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw);
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s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw);
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s32 e1000_disable_pcie_master_generic(struct e1000_hw *hw);
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s32 e1000_force_mac_fc_generic(struct e1000_hw *hw);
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s32 e1000_get_auto_rd_done_generic(struct e1000_hw *hw);
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s32 e1000_get_bus_info_pci_generic(struct e1000_hw *hw);
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s32 e1000_get_bus_info_pcie_generic(struct e1000_hw *hw);
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s32 e1000_get_hw_semaphore_generic(struct e1000_hw *hw);
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s32 e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,
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u16 *duplex);
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s32 e1000_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw *hw,
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u16 *speed, u16 *duplex);
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s32 e1000_id_led_init_generic(struct e1000_hw *hw);
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s32 e1000_led_on_generic(struct e1000_hw *hw);
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s32 e1000_led_off_generic(struct e1000_hw *hw);
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void e1000_mc_addr_list_update_generic(struct e1000_hw *hw,
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u8 *mc_addr_list, u32 mc_addr_count,
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u32 rar_used_count, u32 rar_count);
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s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw);
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s32 e1000_set_default_fc_generic(struct e1000_hw *hw);
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s32 e1000_set_fc_watermarks_generic(struct e1000_hw *hw);
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s32 e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw);
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s32 e1000_setup_led_generic(struct e1000_hw *hw);
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s32 e1000_setup_link_generic(struct e1000_hw *hw);
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s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw);
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s32 e1000_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,
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u32 offset, u8 data);
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u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr);
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void e1000_clear_hw_cntrs_base_generic(struct e1000_hw *hw);
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void e1000_clear_vfta_generic(struct e1000_hw *hw);
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void e1000_config_collision_dist_generic(struct e1000_hw *hw);
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void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count);
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void e1000_mta_set_generic(struct e1000_hw *hw, u32 hash_value);
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void e1000_pcix_mmrbc_workaround_generic(struct e1000_hw *hw);
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void e1000_put_hw_semaphore_generic(struct e1000_hw *hw);
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void e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
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void e1000_remove_device_generic(struct e1000_hw *hw);
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void e1000_reset_adaptive_generic(struct e1000_hw *hw);
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void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop);
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void e1000_update_adaptive_generic(struct e1000_hw *hw);
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void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
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#endif
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