4b7ec27007
one. Interestingly, these are actually the default for quite some time (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9) since r52045) but even recently added device drivers do this unnecessarily. Discussed with: jhb, marcel - While at it, use DEVMETHOD_END. Discussed with: jhb - Also while at it, use __FBSDID.
411 lines
12 KiB
C
411 lines
12 KiB
C
/*-
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* Copyright (c) 2000 Matthew R. Green
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* Copyright (c) 2007 Marius Strobl <marius@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: NetBSD: if_hme_pci.c,v 1.14 2004/03/17 08:58:23 martin Exp
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* PCI front-end device driver for the HME ethernet device.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/resource.h>
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#include <sys/socket.h>
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#include <machine/bus.h>
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#if defined(__powerpc__) || defined(__sparc64__)
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#include <dev/ofw/openfirm.h>
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#include <machine/ofw_machdep.h>
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#endif
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/hme/if_hmereg.h>
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#include <dev/hme/if_hmevar.h>
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#include "miibus_if.h"
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struct hme_pci_softc {
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struct hme_softc hsc_hme; /* HME device */
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struct resource *hsc_sres;
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struct resource *hsc_ires;
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void *hsc_ih;
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};
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static int hme_pci_probe(device_t);
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static int hme_pci_attach(device_t);
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static int hme_pci_detach(device_t);
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static int hme_pci_suspend(device_t);
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static int hme_pci_resume(device_t);
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static device_method_t hme_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, hme_pci_probe),
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DEVMETHOD(device_attach, hme_pci_attach),
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DEVMETHOD(device_detach, hme_pci_detach),
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DEVMETHOD(device_suspend, hme_pci_suspend),
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DEVMETHOD(device_resume, hme_pci_resume),
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/* Can just use the suspend method here. */
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DEVMETHOD(device_shutdown, hme_pci_suspend),
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/* MII interface */
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DEVMETHOD(miibus_readreg, hme_mii_readreg),
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DEVMETHOD(miibus_writereg, hme_mii_writereg),
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DEVMETHOD(miibus_statchg, hme_mii_statchg),
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DEVMETHOD_END
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};
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static driver_t hme_pci_driver = {
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"hme",
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hme_pci_methods,
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sizeof(struct hme_pci_softc)
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};
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DRIVER_MODULE(hme, pci, hme_pci_driver, hme_devclass, 0, 0);
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MODULE_DEPEND(hme, pci, 1, 1, 1);
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MODULE_DEPEND(hme, ether, 1, 1, 1);
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#define PCI_VENDOR_SUN 0x108e
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#define PCI_PRODUCT_SUN_EBUS 0x1000
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#define PCI_PRODUCT_SUN_HMENETWORK 0x1001
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int
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hme_pci_probe(device_t dev)
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{
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if (pci_get_vendor(dev) == PCI_VENDOR_SUN &&
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pci_get_device(dev) == PCI_PRODUCT_SUN_HMENETWORK) {
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device_set_desc(dev, "Sun HME 10/100 Ethernet");
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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int
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hme_pci_attach(device_t dev)
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{
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struct hme_pci_softc *hsc;
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struct hme_softc *sc;
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bus_space_tag_t memt;
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bus_space_handle_t memh;
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int i, error = 0;
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#if !(defined(__powerpc__) || defined(__sparc64__))
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device_t *children, ebus_dev;
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struct resource *ebus_rres;
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int j, slot;
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#endif
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pci_enable_busmaster(dev);
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/*
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* Some Sun HMEs do have their intpin register bogusly set to 0,
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* although it should be 1. Correct that.
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*/
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if (pci_get_intpin(dev) == 0)
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pci_set_intpin(dev, 1);
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hsc = device_get_softc(dev);
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sc = &hsc->hsc_hme;
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sc->sc_dev = dev;
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sc->sc_flags |= HME_PCI;
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mtx_init(&sc->sc_lock, device_get_nameunit(dev), MTX_NETWORK_LOCK,
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MTX_DEF);
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/*
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* Map five register banks:
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*
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* bank 0: HME SEB registers: +0x0000
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* bank 1: HME ETX registers: +0x2000
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* bank 2: HME ERX registers: +0x4000
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* bank 3: HME MAC registers: +0x6000
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* bank 4: HME MIF registers: +0x7000
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*
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*/
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i = PCIR_BAR(0);
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hsc->hsc_sres = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&i, RF_ACTIVE);
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if (hsc->hsc_sres == NULL) {
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device_printf(dev, "could not map device registers\n");
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error = ENXIO;
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goto fail_mtx;
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}
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i = 0;
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hsc->hsc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&i, RF_SHAREABLE | RF_ACTIVE);
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if (hsc->hsc_ires == NULL) {
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device_printf(dev, "could not allocate interrupt\n");
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error = ENXIO;
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goto fail_sres;
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}
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memt = rman_get_bustag(hsc->hsc_sres);
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memh = rman_get_bushandle(hsc->hsc_sres);
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sc->sc_sebt = sc->sc_etxt = sc->sc_erxt = sc->sc_mact = sc->sc_mift =
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memt;
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bus_space_subregion(memt, memh, 0x0000, 0x1000, &sc->sc_sebh);
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bus_space_subregion(memt, memh, 0x2000, 0x1000, &sc->sc_etxh);
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bus_space_subregion(memt, memh, 0x4000, 0x1000, &sc->sc_erxh);
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bus_space_subregion(memt, memh, 0x6000, 0x1000, &sc->sc_mach);
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bus_space_subregion(memt, memh, 0x7000, 0x1000, &sc->sc_mifh);
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#if defined(__powerpc__) || defined(__sparc64__)
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OF_getetheraddr(dev, sc->sc_enaddr);
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#else
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/*
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* Dig out VPD (vital product data) and read NA (network address).
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*
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* The PCI HME is a PCIO chip, which is composed of two functions:
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* function 0: PCI-EBus2 bridge, and
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* function 1: HappyMeal Ethernet controller.
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*
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* The VPD of HME resides in the Boot PROM (PCI FCode) attached
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* to the EBus bridge and can't be accessed via the PCI capability
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* pointer.
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* ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later)
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* chapter 2 describes the data structure.
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*
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* We don't have a MI EBus driver since no EBus device exists
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* (besides the FCode PROM) on add-on HME boards. The ``no driver
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* attached'' message for function 0 therefore is what is expected.
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*/
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#define PCI_ROMHDR_SIZE 0x1c
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#define PCI_ROMHDR_SIG 0x00
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#define PCI_ROMHDR_SIG_MAGIC 0xaa55 /* little endian */
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#define PCI_ROMHDR_PTR_DATA 0x18
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#define PCI_ROM_SIZE 0x18
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#define PCI_ROM_SIG 0x00
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#define PCI_ROM_SIG_MAGIC 0x52494350 /* "PCIR", endian */
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/* reversed */
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#define PCI_ROM_VENDOR 0x04
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#define PCI_ROM_DEVICE 0x06
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#define PCI_ROM_PTR_VPD 0x08
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#define PCI_VPDRES_BYTE0 0x00
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#define PCI_VPDRES_ISLARGE(x) ((x) & 0x80)
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#define PCI_VPDRES_LARGE_NAME(x) ((x) & 0x7f)
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#define PCI_VPDRES_TYPE_VPD 0x10 /* large */
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#define PCI_VPDRES_LARGE_LEN_LSB 0x01
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#define PCI_VPDRES_LARGE_LEN_MSB 0x02
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#define PCI_VPDRES_LARGE_DATA 0x03
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#define PCI_VPD_SIZE 0x03
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#define PCI_VPD_KEY0 0x00
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#define PCI_VPD_KEY1 0x01
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#define PCI_VPD_LEN 0x02
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#define PCI_VPD_DATA 0x03
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#define HME_ROM_READ_N(n, offs) bus_space_read_ ## n (memt, memh, (offs))
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#define HME_ROM_READ_1(offs) HME_ROM_READ_N(1, (offs))
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#define HME_ROM_READ_2(offs) HME_ROM_READ_N(2, (offs))
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#define HME_ROM_READ_4(offs) HME_ROM_READ_N(4, (offs))
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/* Search accompanying EBus bridge. */
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slot = pci_get_slot(dev);
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if (device_get_children(device_get_parent(dev), &children, &i) != 0) {
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device_printf(dev, "could not get children\n");
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error = ENXIO;
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goto fail_sres;
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}
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ebus_dev = NULL;
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for (j = 0; j < i; j++) {
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if (pci_get_class(children[j]) == PCIC_BRIDGE &&
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pci_get_vendor(children[j]) == PCI_VENDOR_SUN &&
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pci_get_device(children[j]) == PCI_PRODUCT_SUN_EBUS &&
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pci_get_slot(children[j]) == slot) {
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ebus_dev = children[j];
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break;
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}
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}
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if (ebus_dev == NULL) {
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device_printf(dev, "could not find EBus bridge\n");
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error = ENXIO;
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goto fail_children;
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}
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/* Map EBus bridge PROM registers. */
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i = PCIR_BAR(0);
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if ((ebus_rres = bus_alloc_resource_any(ebus_dev, SYS_RES_MEMORY,
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&i, RF_ACTIVE)) == NULL) {
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device_printf(dev, "could not map PROM registers\n");
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error = ENXIO;
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goto fail_children;
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}
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memt = rman_get_bustag(ebus_rres);
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memh = rman_get_bushandle(ebus_rres);
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/* Read PCI Expansion ROM header. */
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if (HME_ROM_READ_2(PCI_ROMHDR_SIG) != PCI_ROMHDR_SIG_MAGIC ||
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(i = HME_ROM_READ_2(PCI_ROMHDR_PTR_DATA)) < PCI_ROMHDR_SIZE) {
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device_printf(dev, "unexpected PCI Expansion ROM header\n");
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error = ENXIO;
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goto fail_rres;
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}
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/* Read PCI Expansion ROM data. */
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if (HME_ROM_READ_4(i + PCI_ROM_SIG) != PCI_ROM_SIG_MAGIC ||
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HME_ROM_READ_2(i + PCI_ROM_VENDOR) != pci_get_vendor(dev) ||
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HME_ROM_READ_2(i + PCI_ROM_DEVICE) != pci_get_device(dev) ||
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(j = HME_ROM_READ_2(i + PCI_ROM_PTR_VPD)) < i + PCI_ROM_SIZE) {
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device_printf(dev, "unexpected PCI Expansion ROM data\n");
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error = ENXIO;
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goto fail_rres;
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}
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/*
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* Read PCI VPD.
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* SUNW,hme cards have a single large resource VPD-R tag
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* containing one NA. SUNW,qfe cards have four large resource
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* VPD-R tags containing one NA each (all four HME chips share
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* the same PROM).
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* The VPD used on both cards is not in PCI 2.2 standard format
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* however. The length in the resource header is in big endian
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* and the end tag is non-standard (0x79) and followed by an
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* all-zero "checksum" byte. Sun calls this a "Fresh Choice
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* Ethernet" VPD...
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*/
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/* Look at the end tag to determine whether this is a VPD with 4 NAs. */
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if (HME_ROM_READ_1(j + PCI_VPDRES_LARGE_DATA + PCI_VPD_SIZE +
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ETHER_ADDR_LEN) != 0x79 &&
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HME_ROM_READ_1(j + 4 * (PCI_VPDRES_LARGE_DATA + PCI_VPD_SIZE +
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ETHER_ADDR_LEN)) == 0x79)
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/* Use the Nth NA for the Nth HME on this SUNW,qfe. */
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j += slot * (PCI_VPDRES_LARGE_DATA + PCI_VPD_SIZE +
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ETHER_ADDR_LEN);
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if (PCI_VPDRES_ISLARGE(HME_ROM_READ_1(j + PCI_VPDRES_BYTE0)) == 0 ||
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PCI_VPDRES_LARGE_NAME(HME_ROM_READ_1(j + PCI_VPDRES_BYTE0)) !=
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PCI_VPDRES_TYPE_VPD ||
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(HME_ROM_READ_1(j + PCI_VPDRES_LARGE_LEN_LSB) << 8 |
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HME_ROM_READ_1(j + PCI_VPDRES_LARGE_LEN_MSB)) !=
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PCI_VPD_SIZE + ETHER_ADDR_LEN ||
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HME_ROM_READ_1(j + PCI_VPDRES_LARGE_DATA + PCI_VPD_KEY0) !=
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0x4e /* N */ ||
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HME_ROM_READ_1(j + PCI_VPDRES_LARGE_DATA + PCI_VPD_KEY1) !=
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0x41 /* A */ ||
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HME_ROM_READ_1(j + PCI_VPDRES_LARGE_DATA + PCI_VPD_LEN) !=
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ETHER_ADDR_LEN) {
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device_printf(dev, "unexpected PCI VPD\n");
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error = ENXIO;
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goto fail_rres;
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}
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bus_space_read_region_1(memt, memh, j + PCI_VPDRES_LARGE_DATA +
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PCI_VPD_DATA, sc->sc_enaddr, ETHER_ADDR_LEN);
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fail_rres:
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bus_release_resource(ebus_dev, SYS_RES_MEMORY,
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rman_get_rid(ebus_rres), ebus_rres);
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fail_children:
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free(children, M_TEMP);
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if (error != 0)
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goto fail_sres;
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#endif
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sc->sc_burst = 64; /* XXX */
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/*
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* call the main configure
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*/
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if ((error = hme_config(sc)) != 0) {
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device_printf(dev, "could not be configured\n");
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goto fail_ires;
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}
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if ((error = bus_setup_intr(dev, hsc->hsc_ires, INTR_TYPE_NET |
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INTR_MPSAFE, NULL, hme_intr, sc, &hsc->hsc_ih)) != 0) {
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device_printf(dev, "couldn't establish interrupt\n");
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hme_detach(sc);
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goto fail_ires;
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}
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return (0);
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fail_ires:
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bus_release_resource(dev, SYS_RES_IRQ,
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rman_get_rid(hsc->hsc_ires), hsc->hsc_ires);
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fail_sres:
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bus_release_resource(dev, SYS_RES_MEMORY,
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rman_get_rid(hsc->hsc_sres), hsc->hsc_sres);
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fail_mtx:
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mtx_destroy(&sc->sc_lock);
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return (error);
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}
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static int
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hme_pci_detach(device_t dev)
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{
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struct hme_pci_softc *hsc;
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struct hme_softc *sc;
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hsc = device_get_softc(dev);
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sc = &hsc->hsc_hme;
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bus_teardown_intr(dev, hsc->hsc_ires, hsc->hsc_ih);
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hme_detach(sc);
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bus_release_resource(dev, SYS_RES_IRQ,
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rman_get_rid(hsc->hsc_ires), hsc->hsc_ires);
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bus_release_resource(dev, SYS_RES_MEMORY,
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rman_get_rid(hsc->hsc_sres), hsc->hsc_sres);
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mtx_destroy(&sc->sc_lock);
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return (0);
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}
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static int
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hme_pci_suspend(device_t dev)
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{
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struct hme_pci_softc *hsc;
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hsc = device_get_softc(dev);
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hme_suspend(&hsc->hsc_hme);
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return (0);
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}
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static int
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hme_pci_resume(device_t dev)
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{
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struct hme_pci_softc *hsc;
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hsc = device_get_softc(dev);
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hme_resume(&hsc->hsc_hme);
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return (0);
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}
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