0f822edead
that it can connect to switches at speeds other than 1gb. This requires changing the reference clock speed. Since we still don't have a general clock API that lets a SoC-independant driver manipulate its own clocks, this change includes a weak reference to a routine named cgem_set_ref_clk(). The default implementation is a no-op; SoC-specific code can provide an implementation that actually changes the speed. Submitted by: Thomas Skibo <ThomasSkibo@sbcglobal.net> |
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allwinner | ||
arm | ||
at91 | ||
broadcom/bcm2835 | ||
cavium/cns11xx | ||
conf | ||
freescale | ||
include | ||
lpc | ||
mv | ||
rockchip | ||
s3c2xx0 | ||
samsung/exynos | ||
ti | ||
versatile | ||
xilinx | ||
xscale |