adrian 10450b4fc3 Sync this code against what's in OpenWRT trunk. ... * the openwrt code doesn't treat 0/0/0 any differently from other bus/slot/func combinations. * A "local write" function writes to the LCONF area, and so I've added it. * The PCI workaround at attach time uses this LCONF code, which it already did .. * .. but it is a 4 byte write, not a 2 byte write. Even though it's PCIR_COMMAND which is a two byte PCI register. Tested on: AR7161 TODO: The other two AR71xx derivatives TODO: More thoroughly stare at the datasheets I do have and if it indeed is incorrect, push fixes to both FreeBSD and Linux/OpenWRT. Obtained from: Linux OpenWRT		2012-04-13 06:11:24 +00:00
..
apb.c	Move PMC hook invocation to cpu_intr. The idea is the same as with ast()	2012-03-22 17:47:52 +00:00
apbvar.h	- Add intr counters for APB interrupts	2009-11-18 22:53:05 +00:00
ar71xx_bus_space_reversed.c	- Handle byte-order issue for non-word accesses to memory mapped	2009-04-19 22:56:35 +00:00
ar71xx_bus_space_reversed.h	- Handle byte-order issue for non-word accesses to memory mapped	2009-04-19 22:56:35 +00:00
ar71xx_chip.c	Begin fleshing out MII clock rate configuration changes.	2012-03-17 07:25:23 +00:00
ar71xx_chip.h	Preparation work for supporting the AR91xx and AR724x.	2010-08-19 02:03:12 +00:00
ar71xx_cpudef.h	Begin fleshing out MII clock rate configuration changes.	2012-03-17 07:25:23 +00:00
ar71xx_ehci.c	Implement better support for USB controller suspend and resume.	2011-12-14 00:28:54 +00:00
ar71xx_gpio.c	Remove these locks - they aren't strictly needed and cause measurable	2011-12-20 00:33:56 +00:00
ar71xx_gpiovar.h	Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.	2011-05-06 02:45:02 +00:00
ar71xx_machdep.c	Remove platform APIs which are not used by any code and which had only stub	2012-03-12 07:34:15 +00:00
ar71xx_ohci.c	Implement better support for USB controller suspend and resume.	2011-12-14 00:28:54 +00:00
ar71xx_pci_bus_space.c	- Add pci bus space that translates byte order to little endian,	2009-05-15 21:36:50 +00:00
ar71xx_pci_bus_space.h	- Add pci bus space that translates byte order to little endian,	2009-05-15 21:36:50 +00:00
ar71xx_pci.c	Sync this code against what's in OpenWRT trunk.	2012-04-13 06:11:24 +00:00
ar71xx_setup.c	Remove duplicate header includes	2011-06-26 10:07:48 +00:00
ar71xx_setup.h	Preparation work for supporting the AR91xx and AR724x.	2010-08-19 02:03:12 +00:00
ar71xx_spi.c	- Remove unnecessary register writes in activate_device	2010-01-21 00:15:59 +00:00
ar71xx_wdog.c	Preparation work for supporting the AR91xx and AR724x.	2010-08-19 02:03:12 +00:00
ar71xxreg.h	Begin fleshing out MII clock rate configuration changes.	2012-03-17 07:25:23 +00:00
ar91xx_chip.c	Begin fleshing out MII clock rate configuration changes.	2012-03-17 07:25:23 +00:00
ar91xx_chip.h	Add initial Atheros AR91XX support.	2010-08-19 11:40:10 +00:00
ar91xxreg.h	Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.	2011-05-06 02:45:02 +00:00
ar724x_chip.c	style(9) changes.	2012-03-17 07:29:11 +00:00
ar724x_chip.h	Add some initial AR724X chipset support.	2010-08-19 11:53:55 +00:00
ar724x_pci.c	Fix the ar724x shift calculation when writing to the PCI config space.	2012-01-07 04:13:25 +00:00
ar724xreg.h	Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.	2011-05-06 02:45:02 +00:00
files.ar71xx	Rework MIPS PMC code:	2012-03-22 18:01:23 +00:00
if_arge.c	Remove a now unneeded ARGE_UNLOCK().	2012-03-13 06:50:56 +00:00
if_argevar.h	* Add some more debugging to if_arge	2011-04-05 06:33:35 +00:00
pcf2123_rtc.c	- Add driver for PCF2123, SPI real time clock/calendar	2010-01-22 22:14:12 +00:00
pcf2123reg.h	- Add driver for PCF2123, SPI real time clock/calendar	2010-01-22 22:14:12 +00:00
std.ar71xx	Assume a big-endian default on MIPS and drop the "eb" suffix from MACHINE_ARCH.	2012-03-29 02:54:35 +00:00
uart_bus_ar71xx.c	Preparation work for supporting the AR91xx and AR724x.	2010-08-19 02:03:12 +00:00
uart_cpu_ar71xx.c	Preparation work for supporting the AR91xx and AR724x.	2010-08-19 02:03:12 +00:00