7c669ab6cc
Differential Revision: https://reviews.freebsd.org/D3160 Submitted by: erj MFC after: 2 weeks Sponsored by: Intel Corportation
96 lines
3.1 KiB
C
96 lines
3.1 KiB
C
/******************************************************************************
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Copyright (c) 2001-2015, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#include "e1000_api.h"
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/*
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* NOTE: the following routines using the e1000
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* naming style are provided to the shared
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* code but are OS specific
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*/
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void
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e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
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{
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pci_write_config(((struct e1000_osdep *)hw->back)->dev, reg, *value, 2);
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}
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void
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e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value)
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{
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*value = pci_read_config(((struct e1000_osdep *)hw->back)->dev, reg, 2);
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}
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void
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e1000_pci_set_mwi(struct e1000_hw *hw)
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{
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pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND,
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(hw->bus.pci_cmd_word | CMD_MEM_WRT_INVALIDATE), 2);
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}
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void
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e1000_pci_clear_mwi(struct e1000_hw *hw)
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{
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pci_write_config(((struct e1000_osdep *)hw->back)->dev, PCIR_COMMAND,
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(hw->bus.pci_cmd_word & ~CMD_MEM_WRT_INVALIDATE), 2);
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}
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/*
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* Read the PCI Express capabilities
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*/
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int32_t
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e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
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{
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device_t dev = ((struct e1000_osdep *)hw->back)->dev;
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u32 offset;
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pci_find_cap(dev, PCIY_EXPRESS, &offset);
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*value = pci_read_config(dev, offset + reg, 2);
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return (E1000_SUCCESS);
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}
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/*
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* Write the PCI Express capabilities
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*/
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int32_t
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e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
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{
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device_t dev = ((struct e1000_osdep *)hw->back)->dev;
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u32 offset;
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pci_find_cap(dev, PCIY_EXPRESS, &offset);
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pci_write_config(dev, offset + reg, *value, 2);
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return (E1000_SUCCESS);
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}
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