This is the general support to allow the use of GPIO pins as interrupt sources for direct gpiobus children. The use of GPIO pins as generic interrupt sources (for an ethernet driver for example) will only be possible when arm/intrng is complete. Then, most of this code will need to be rewritten, but it works for now, is better than what we have and will allow further developments. Tested on: ar71xx (RSPRO), am335x (BBB), bcm2835 (Raspberry pi) Differential Revision: https://reviews.freebsd.org/D999 Reviewed by: rpaulo
382 lines
9.8 KiB
C
382 lines
9.8 KiB
C
/*-
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* Copyright (c) 2009, Nathan Whitehorn <nwhitehorn@FreeBSD.org>
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* Copyright (c) 2013, Luiz Otavio O Souza <loos@FreeBSD.org>
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* Copyright (c) 2013 The FreeBSD Foundation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/ofw/ofw_bus.h>
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static int ofw_gpiobus_parse_gpios(struct gpiobus_softc *,
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struct gpiobus_ivar *, phandle_t);
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static struct ofw_gpiobus_devinfo *ofw_gpiobus_setup_devinfo(device_t,
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phandle_t);
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static void ofw_gpiobus_destroy_devinfo(struct ofw_gpiobus_devinfo *);
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device_t
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ofw_gpiobus_add_fdt_child(device_t bus, phandle_t child)
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{
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struct ofw_gpiobus_devinfo *dinfo;
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device_t childdev;
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/*
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* Set up the GPIO child and OFW bus layer devinfo and add it to bus.
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*/
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dinfo = ofw_gpiobus_setup_devinfo(bus, child);
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if (dinfo == NULL)
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return (NULL);
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childdev = device_add_child(bus, NULL, -1);
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if (childdev == NULL) {
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device_printf(bus, "could not add child: %s\n",
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dinfo->opd_obdinfo.obd_name);
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ofw_gpiobus_destroy_devinfo(dinfo);
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return (NULL);
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}
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device_set_ivars(childdev, dinfo);
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return (childdev);
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}
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static int
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ofw_gpiobus_alloc_ivars(struct gpiobus_ivar *dinfo)
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{
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/* Allocate pins and flags memory. */
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dinfo->pins = malloc(sizeof(uint32_t) * dinfo->npins, M_DEVBUF,
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M_NOWAIT | M_ZERO);
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if (dinfo->pins == NULL)
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return (ENOMEM);
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dinfo->flags = malloc(sizeof(uint32_t) * dinfo->npins, M_DEVBUF,
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M_NOWAIT | M_ZERO);
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if (dinfo->flags == NULL) {
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free(dinfo->pins, M_DEVBUF);
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return (ENOMEM);
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}
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return (0);
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}
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static void
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ofw_gpiobus_free_ivars(struct gpiobus_ivar *dinfo)
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{
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free(dinfo->flags, M_DEVBUF);
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free(dinfo->pins, M_DEVBUF);
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}
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static int
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ofw_gpiobus_parse_gpios(struct gpiobus_softc *sc, struct gpiobus_ivar *dinfo,
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phandle_t child)
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{
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int cells, i, j, len;
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pcell_t *gpios;
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phandle_t gpio;
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/* Retrieve the gpios property. */
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if ((len = OF_getproplen(child, "gpios")) < 0)
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return (EINVAL);
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gpios = malloc(len, M_DEVBUF, M_NOWAIT | M_ZERO);
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if (gpios == NULL)
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return (ENOMEM);
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if (OF_getencprop(child, "gpios", gpios, len) < 0) {
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free(gpios, M_DEVBUF);
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return (EINVAL);
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}
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/*
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* The gpio-specifier is controller independent, but the first pcell
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* has the reference to the GPIO controller phandler.
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* One the first pass we count the number of encoded gpio-specifiers.
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*/
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i = 0;
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len /= sizeof(pcell_t);
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while (i < len) {
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/* Allow NULL specifiers. */
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if (gpios[i] == 0) {
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dinfo->npins++;
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i++;
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continue;
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}
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gpio = OF_node_from_xref(gpios[i]);
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/* Verify if we're attaching to the correct GPIO controller. */
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if (!OF_hasprop(gpio, "gpio-controller") ||
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gpio != ofw_bus_get_node(sc->sc_dev)) {
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free(gpios, M_DEVBUF);
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return (EINVAL);
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}
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/* Read gpio-cells property for this GPIO controller. */
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if (OF_getencprop(gpio, "#gpio-cells", &cells,
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sizeof(cells)) < 0) {
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free(gpios, M_DEVBUF);
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return (EINVAL);
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}
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dinfo->npins++;
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i += cells + 1;
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}
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if (dinfo->npins == 0) {
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free(gpios, M_DEVBUF);
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return (EINVAL);
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}
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/* Allocate the child resources. */
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if (ofw_gpiobus_alloc_ivars(dinfo) != 0) {
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free(gpios, M_DEVBUF);
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return (ENOMEM);
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}
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/* Decode the gpio specifier on the second pass. */
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i = 0;
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j = 0;
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while (i < len) {
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/* Allow NULL specifiers. */
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if (gpios[i] == 0) {
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i++;
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j++;
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continue;
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}
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gpio = OF_node_from_xref(gpios[i]);
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/* Read gpio-cells property for this GPIO controller. */
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if (OF_getencprop(gpio, "#gpio-cells", &cells,
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sizeof(cells)) < 0) {
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ofw_gpiobus_free_ivars(dinfo);
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free(gpios, M_DEVBUF);
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return (EINVAL);
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}
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/* Get the GPIO pin number and flags. */
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if (gpio_map_gpios(sc->sc_dev, child, gpio, cells,
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&gpios[i + 1], &dinfo->pins[j], &dinfo->flags[j]) != 0) {
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ofw_gpiobus_free_ivars(dinfo);
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free(gpios, M_DEVBUF);
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return (EINVAL);
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}
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/* Consistency check. */
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if (dinfo->pins[j] > sc->sc_npins) {
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device_printf(sc->sc_busdev,
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"invalid pin %d, max: %d\n",
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dinfo->pins[j], sc->sc_npins - 1);
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ofw_gpiobus_free_ivars(dinfo);
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free(gpios, M_DEVBUF);
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return (EINVAL);
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}
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/*
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* Mark pin as mapped and give warning if it's already mapped.
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*/
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if (sc->sc_pins_mapped[dinfo->pins[j]]) {
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device_printf(sc->sc_busdev,
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"warning: pin %d is already mapped\n",
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dinfo->pins[j]);
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ofw_gpiobus_free_ivars(dinfo);
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free(gpios, M_DEVBUF);
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return (EINVAL);
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}
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sc->sc_pins_mapped[dinfo->pins[j]] = 1;
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i += cells + 1;
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j++;
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}
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free(gpios, M_DEVBUF);
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return (0);
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}
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static struct ofw_gpiobus_devinfo *
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ofw_gpiobus_setup_devinfo(device_t dev, phandle_t node)
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{
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struct gpiobus_softc *sc;
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struct ofw_gpiobus_devinfo *dinfo;
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sc = device_get_softc(dev);
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dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_NOWAIT | M_ZERO);
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if (dinfo == NULL)
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return (NULL);
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if (ofw_bus_gen_setup_devinfo(&dinfo->opd_obdinfo, node) != 0) {
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free(dinfo, M_DEVBUF);
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return (NULL);
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}
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/* Parse the gpios property for the child. */
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if (ofw_gpiobus_parse_gpios(sc, &dinfo->opd_dinfo, node) != 0) {
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ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
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free(dinfo, M_DEVBUF);
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return (NULL);
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}
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/* And now the interrupt resources. */
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resource_list_init(&dinfo->opd_dinfo.rl);
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if (ofw_bus_intr_to_rl(dev, node, &dinfo->opd_dinfo.rl) != 0) {
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ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
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free(dinfo, M_DEVBUF);
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return (NULL);
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}
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return (dinfo);
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}
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static void
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ofw_gpiobus_destroy_devinfo(struct ofw_gpiobus_devinfo *dinfo)
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{
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resource_list_free(&dinfo->opd_dinfo.rl);
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ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
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free(dinfo, M_DEVBUF);
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}
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static int
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ofw_gpiobus_probe(device_t dev)
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{
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if (ofw_bus_get_node(dev) == -1)
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return (ENXIO);
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device_set_desc(dev, "OFW GPIO bus");
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return (0);
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}
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static int
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ofw_gpiobus_attach(device_t dev)
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{
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int err;
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phandle_t child;
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err = gpiobus_init_softc(dev);
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if (err != 0)
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return (err);
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bus_generic_probe(dev);
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bus_enumerate_hinted_children(dev);
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/*
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* Attach the children represented in the device tree.
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*/
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for (child = OF_child(ofw_bus_get_node(dev)); child != 0;
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child = OF_peer(child))
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if (ofw_gpiobus_add_fdt_child(dev, child) == NULL)
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continue;
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return (bus_generic_attach(dev));
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}
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static device_t
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ofw_gpiobus_add_child(device_t dev, u_int order, const char *name, int unit)
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{
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device_t child;
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struct ofw_gpiobus_devinfo *devi;
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child = device_add_child_ordered(dev, order, name, unit);
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if (child == NULL)
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return (child);
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devi = malloc(sizeof(struct ofw_gpiobus_devinfo), M_DEVBUF,
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M_NOWAIT | M_ZERO);
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if (devi == NULL) {
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device_delete_child(dev, child);
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return (0);
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}
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/*
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* NULL all the OFW-related parts of the ivars for non-OFW
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* children.
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*/
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devi->opd_obdinfo.obd_node = -1;
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devi->opd_obdinfo.obd_name = NULL;
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devi->opd_obdinfo.obd_compat = NULL;
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devi->opd_obdinfo.obd_type = NULL;
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devi->opd_obdinfo.obd_model = NULL;
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device_set_ivars(child, devi);
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return (child);
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}
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static int
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ofw_gpiobus_print_child(device_t dev, device_t child)
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{
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struct ofw_gpiobus_devinfo *devi;
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int retval = 0;
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devi = device_get_ivars(child);
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retval += bus_print_child_header(dev, child);
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retval += printf(" at pin(s) ");
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gpiobus_print_pins(&devi->opd_dinfo);
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resource_list_print_type(&devi->opd_dinfo.rl, "irq", SYS_RES_IRQ,
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"%ld");
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retval += bus_print_child_footer(dev, child);
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return (retval);
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}
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static const struct ofw_bus_devinfo *
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ofw_gpiobus_get_devinfo(device_t bus, device_t dev)
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{
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struct ofw_gpiobus_devinfo *dinfo;
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dinfo = device_get_ivars(dev);
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return (&dinfo->opd_obdinfo);
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}
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static device_method_t ofw_gpiobus_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ofw_gpiobus_probe),
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DEVMETHOD(device_attach, ofw_gpiobus_attach),
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/* Bus interface */
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DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str),
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DEVMETHOD(bus_print_child, ofw_gpiobus_print_child),
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DEVMETHOD(bus_add_child, ofw_gpiobus_add_child),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_devinfo, ofw_gpiobus_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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DEVMETHOD_END
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};
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static devclass_t ofwgpiobus_devclass;
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DEFINE_CLASS_1(gpiobus, ofw_gpiobus_driver, ofw_gpiobus_methods,
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sizeof(struct gpiobus_softc), gpiobus_driver);
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DRIVER_MODULE(ofw_gpiobus, gpio, ofw_gpiobus_driver, ofwgpiobus_devclass, 0, 0);
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MODULE_VERSION(ofw_gpiobus, 1);
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MODULE_DEPEND(ofw_gpiobus, gpiobus, 1, 1, 1);
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