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front-end doesn't support SDMA or the latter implements a platform- specific transfer method instead. While at it, factor out allocation and freeing of SDMA resources to sdhci_dma_{alloc,free}() in order to keep the code more readable when adding support for ADMA variants. o Base the size of the SDMA bounce buffer on MAXPHYS up to the maximum of 512 KiB instead of using a fixed 4-KiB-buffer. With the default MAXPHYS of 128 KiB and depending on the controller and medium, this reduces the number of SDHCI interrupts by a factor of ~16 to ~32 on sequential reads while an increase of throughput of up to ~84 % was seen. Front-ends for broken controllers that only support an SDMA buffer boundary of a specific size may set SDHCI_QUIRK_BROKEN_SDMA_BOUNDARY and supply a size via struct sdhci_slot. According to Linux, only Qualcomm MSM-type SDHCI controllers are affected by this, though. Requested by: Shreyank Amartya (unconditional bump to 512 KiB) o Introduce a SDHCI_DEPEND macro for specifying the dependency of the front-end modules on the sdhci(4) one and bump the module version of sdhci(4) to 2 via an also newly introduced SDHCI_VERSION in order to ensure that all components are in sync WRT struct sdhci_slot. o In sdhci(4): - Make pointers const were applicable, - replace a few device_printf(9) calls with slot_printf() for consistency, and - sync some local functions with their prototypes WRT static. |
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.. | ||
drm2 | ||
tegra124 | ||
as3722_gpio.c | ||
as3722_regulators.c | ||
as3722_rtc.c | ||
as3722.c | ||
as3722.h | ||
tegra_abpmisc.c | ||
tegra_ahci.c | ||
tegra_efuse.c | ||
tegra_efuse.h | ||
tegra_ehci.c | ||
tegra_gpio.c | ||
tegra_i2c.c | ||
tegra_lic.c | ||
tegra_mc.c | ||
tegra_pcie.c | ||
tegra_pinmux.c | ||
tegra_pmc.h | ||
tegra_rtc.c | ||
tegra_sdhci.c | ||
tegra_soctherm_if.m | ||
tegra_soctherm.c | ||
tegra_uart.c | ||
tegra_usbphy.c | ||
tegra_xhci.c |