148eac48f1
instruction requires that a translation is present in the TC. This may trigger a TLB miss and a subsequent call to vm_fault(). This implementation is deliberately non-inline for debugging and profiling purposes. Partial or full inlining should eventually be done. Valuable insights by: jake |
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acpica | ||
compile | ||
conf | ||
ia32 | ||
ia64 | ||
include | ||
isa | ||
pci |