4ad6106939
* Support for sam9 "EMAC" controller. * Support for rmii interface to phy. at91.c & at91sam9.c: * Eliminate separate at91sam9.c file. * Add new devices to at91sam9_devs table. at91_machdep.c & at at91sam9_machdep.c: * Automatic chip type determination. * Remove compile time chip dependencies. * Eliminate separate at91sam9_machdep.c file. at91_pmc.c: * Corrected support for all of the sam926? and sam9g20 chips. * Remove compile time chip dependencies. My apologies to Greg for taking so long to take care of it.
225 lines
5.3 KiB
C
225 lines
5.3 KiB
C
/*-
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* Copyright (c) 2009 Gallon Sylvestre. All rights reserved.
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* Copyright (c) 2010 Greg Ansley. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/resource.h>
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#include <sys/systm.h>
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#include <sys/rman.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <sys/watchdog.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/frame.h>
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#include <machine/intr.h>
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#include <machine/resource.h>
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#include <arm/at91/at91var.h>
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#include <arm/at91/at91_pitreg.h>
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static struct pit_softc {
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struct resource *mem_res; /* Memory resource */
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void *intrhand; /* Interrupt handle */
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device_t sc_dev;
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} *sc;
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static uint32_t timecount = 0;
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static inline uint32_t
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RD4(struct pit_softc *sc, bus_size_t off)
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{
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return (bus_read_4(sc->mem_res, off));
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}
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static inline void
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WR4(struct pit_softc *sc, bus_size_t off, uint32_t val)
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{
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bus_write_4(sc->mem_res, off, val);
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}
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static unsigned at91pit_get_timecount(struct timecounter *tc);
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static int pit_intr(void *arg);
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#ifndef PIT_PRESCALE
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#define PIT_PRESCALE (16)
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#endif
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static struct timecounter at91pit_timecounter = {
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at91pit_get_timecount, /* get_timecount */
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NULL, /* no poll_pps */
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0xffffffff, /* counter mask */
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0 / PIT_PRESCALE, /* frequency */
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"AT91SAM9 timer", /* name */
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1000 /* quality */
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};
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static int
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at91pit_probe(device_t dev)
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{
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if (at91_is_sam9()) {
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device_set_desc(dev, "AT91SAM9 PIT");
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return (0);
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}
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return (ENXIO);
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}
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static int
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at91pit_attach(device_t dev)
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{
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void *ih;
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int rid, err = 0;
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struct at91_softc *at91_sc;
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struct resource *irq;
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at91_sc = device_get_softc(device_get_parent(dev));
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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rid = 0;
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sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->mem_res == NULL)
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panic("couldn't allocate register resources");
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rid = 0;
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irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 1, 1, 1,
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RF_ACTIVE | RF_SHAREABLE);
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if (!irq) {
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device_printf(dev, "could not allocate interrupt resources.\n");
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err = ENOMEM;
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goto out;
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}
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/* Activate the interrupt. */
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err = bus_setup_intr(dev, irq, INTR_TYPE_CLK, pit_intr,
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NULL, NULL, &ih);
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at91pit_timecounter.tc_frequency = at91_master_clock / PIT_PRESCALE;
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tc_init(&at91pit_timecounter);
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//Enable the PIT here.
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WR4(sc, PIT_MR,
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PIT_PIV(at91_master_clock / PIT_PRESCALE / hz) |
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PIT_EN | PIT_IEN);
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out:
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return (err);
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}
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static device_method_t at91pit_methods[] = {
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DEVMETHOD(device_probe, at91pit_probe),
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DEVMETHOD(device_attach, at91pit_attach),
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{0,0},
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};
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static driver_t at91pit_driver = {
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"at91_pit",
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at91pit_methods,
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sizeof(struct pit_softc),
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};
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static devclass_t at91pit_devclass;
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DRIVER_MODULE(at91_pit, atmelarm, at91pit_driver, at91pit_devclass, 0, 0);
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static int
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pit_intr(void *arg)
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{
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struct trapframe *fp = arg;
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uint32_t icnt;
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if (RD4(sc, PIT_SR) & PIT_PITS_DONE) {
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icnt = RD4(sc, PIT_PIVR) >> 20;
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/* Just add in the overflows we just read */
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timecount += PIT_PIV(RD4(sc, PIT_MR)) * icnt;
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hardclock(TRAPF_USERMODE(fp), TRAPF_PC(fp));
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return (FILTER_HANDLED);
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}
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return (FILTER_STRAY);
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}
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static unsigned
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at91pit_get_timecount(struct timecounter *tc)
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{
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uint32_t piir, icnt;
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piir = RD4(sc, PIT_PIIR); /* Current count | over flows */
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icnt = piir >> 20; /* Overflows */
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return (timecount + PIT_PIV(piir) + PIT_PIV(RD4(sc, PIT_MR)) * icnt);
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}
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void
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DELAY(int us)
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{
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int32_t cnt, last, piv;
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uint64_t pit_freq;
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const uint64_t mhz = 1E6;
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last = PIT_PIV(RD4(sc, PIT_PIIR));
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/* Max delay ~= 260s. @ 133Mhz */
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pit_freq = at91_master_clock / PIT_PRESCALE;
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cnt = ((pit_freq * us) + (mhz -1)) / mhz;
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cnt = (cnt <= 0) ? 1 : cnt;
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while (cnt > 0) {
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piv = PIT_PIV(RD4(sc, PIT_PIIR));
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cnt -= piv - last ;
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if (piv < last)
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cnt -= PIT_PIV(~0u) - last;
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last = piv;
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}
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}
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/*
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* The 3 next functions must be implement with the future PLL code.
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*/
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void
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cpu_startprofclock(void)
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{
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}
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void
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cpu_stopprofclock(void)
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{
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}
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void
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cpu_initclocks(void)
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{
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}
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