0c47a30d50
Obtained from: NetBSD Submitted by: Andrew Gallatin <gallatin@cs.duke.edu>
102 lines
3.7 KiB
C
102 lines
3.7 KiB
C
/* $Id$ */
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/* $NetBSD: sticreg.h,v 1.1 1997/11/08 07:27:50 jonathan Exp $ */
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/*
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* Copyright (c) 1997 Jonathan Stone
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Jonathan Stone for
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* the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Register definitions for the pixelstamp and stamp interface chip (STIC)
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* used in PMAG-C 2-d and PMAG-D 3-d accelerated TurboChannel framebuffers.
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*/
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#ifndef _TC_STICREG_H_
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#define _TC_STICREG_H_
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struct stic_regs {
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volatile int32_t stic__pad0, __pad1;
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volatile int32_t hsync;
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volatile int32_t hsync2;
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volatile int32_t hblank;
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volatile int32_t vsync;
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volatile int32_t vblank;
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volatile int32_t vtest;
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volatile int32_t ipdvint;
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volatile int32_t stic__pad2;
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volatile int32_t sticsr;
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volatile int32_t busdat;
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volatile int32_t busadr;
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volatile int32_t stic__pad3;
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volatile int32_t buscsr;
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volatile int32_t modcl;
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};
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#define STICADDR(x) ((volatile struct stic_regs*) (x))
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/*
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* Bit definitions for stic_regs.stic_csr.
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* these appear to exactly what the PROM tests use.
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*/
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#define STIC_CSR_TSTFNC 0x00000003
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# define STIC_CSR_TSTFNC_NORMAL 0
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# define STIC_CSR_TSTFNC_PARITY 1
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# define STIC_CSR_TSTFNC_CNTPIX 2
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# define STIC_CSR_TSTFNC_TSTDAC 3
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#define STIC_CSR_CHECKPAR 0x00000004
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#define STIC_CSR_STARTVT 0x00000010
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#define STIC_CSR_START 0x00000020
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#define STIC_CSR_RESET 0x00000040
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#define STIC_CSR_STARTST 0x00000080
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/*
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* Bit definitions for stic_regs.int.
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* Three four-bit wide fields, for error (E), vertical-blank (V), and
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* packetbuf-done (P) intererupts, respectively.
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* The low-order three bits of each field are enable, requested,
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* and acknowledge bits. The top bit of each field is unused.
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*/
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#define STIC_INT_E_EN 0x00000001
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#define STIC_INT_E 0x00000002
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#define STIC_INT_E_WE 0x00000004
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#define STIC_INT_V_EN 0x00000100
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#define STIC_INT_V 0x00000200
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#define STIC_INT_V_WE 0x00000400
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#define STIC_INT_P_EN 0x00010000
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#define STIC_INT_P 0x00020000
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#define STIC_INT_P_WE 0x00040000
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#define STIC_INT_WE (STIC_INT_E_WE|STIC_INT_V_WE|STIC_INT_PE_WE)
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#define STIC_INT_CLR (STIC_INT_E_EN|STIC_INT_V_EN|STIC_INT_P_EN)
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#endif /* _TC_STICREG_H_ */
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