9ad347c496
Verify for invalid modes and unwanted flags before pass the new flags to driver.
793 lines
18 KiB
C
793 lines
18 KiB
C
/*-
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* Copyright (c) 2012 Oleksandr Tymoshenko <gonzo@freebsd.org>
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* Copyright (c) 2012 Luiz Otavio O Souza.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/gpio.h>
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#include <sys/sysctl.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/resource.h>
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#include <machine/fdt.h>
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#include <machine/intr.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/broadcom/bcm2835/bcm2835_gpio.h>
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#include "gpio_if.h"
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#ifdef DEBUG
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#define dprintf(fmt, args...) do { printf("%s(): ", __func__); \
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printf(fmt,##args); } while (0)
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#else
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#define dprintf(fmt, args...)
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#endif
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#define BCM_GPIO_PINS 54
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#define BCM_GPIO_DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
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GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN)
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struct bcm_gpio_sysctl {
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struct bcm_gpio_softc *sc;
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uint32_t pin;
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};
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struct bcm_gpio_softc {
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device_t sc_dev;
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struct mtx sc_mtx;
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struct resource * sc_mem_res;
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struct resource * sc_irq_res;
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bus_space_tag_t sc_bst;
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bus_space_handle_t sc_bsh;
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void * sc_intrhand;
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int sc_gpio_npins;
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int sc_ro_npins;
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int sc_ro_pins[BCM_GPIO_PINS];
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struct gpio_pin sc_gpio_pins[BCM_GPIO_PINS];
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struct bcm_gpio_sysctl sc_sysctl[BCM_GPIO_PINS];
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};
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enum bcm_gpio_pud {
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BCM_GPIO_NONE,
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BCM_GPIO_PULLDOWN,
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BCM_GPIO_PULLUP,
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};
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#define BCM_GPIO_LOCK(_sc) mtx_lock(&_sc->sc_mtx)
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#define BCM_GPIO_UNLOCK(_sc) mtx_unlock(&_sc->sc_mtx)
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#define BCM_GPIO_LOCK_ASSERT(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED)
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#define BCM_GPIO_GPFSEL(_bank) 0x00 + _bank * 4
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#define BCM_GPIO_GPSET(_bank) 0x1c + _bank * 4
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#define BCM_GPIO_GPCLR(_bank) 0x28 + _bank * 4
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#define BCM_GPIO_GPLEV(_bank) 0x34 + _bank * 4
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#define BCM_GPIO_GPPUD(_bank) 0x94
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#define BCM_GPIO_GPPUDCLK(_bank) 0x98 + _bank * 4
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#define BCM_GPIO_WRITE(_sc, _off, _val) \
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bus_space_write_4(_sc->sc_bst, _sc->sc_bsh, _off, _val)
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#define BCM_GPIO_READ(_sc, _off) \
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bus_space_read_4(_sc->sc_bst, _sc->sc_bsh, _off)
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static int
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bcm_gpio_pin_is_ro(struct bcm_gpio_softc *sc, int pin)
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{
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int i;
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for (i = 0; i < sc->sc_ro_npins; i++)
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if (pin == sc->sc_ro_pins[i])
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return (1);
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return (0);
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}
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static uint32_t
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bcm_gpio_get_function(struct bcm_gpio_softc *sc, uint32_t pin)
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{
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uint32_t bank, func, offset;
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/* Five banks, 10 pins per bank, 3 bits per pin. */
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bank = pin / 10;
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offset = (pin - bank * 10) * 3;
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BCM_GPIO_LOCK(sc);
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func = (BCM_GPIO_READ(sc, BCM_GPIO_GPFSEL(bank)) >> offset) & 7;
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BCM_GPIO_UNLOCK(sc);
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return (func);
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}
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static void
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bcm_gpio_func_str(uint32_t nfunc, char *buf, int bufsize)
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{
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switch (nfunc) {
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case BCM_GPIO_INPUT:
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strncpy(buf, "input", bufsize);
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break;
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case BCM_GPIO_OUTPUT:
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strncpy(buf, "output", bufsize);
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break;
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case BCM_GPIO_ALT0:
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strncpy(buf, "alt0", bufsize);
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break;
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case BCM_GPIO_ALT1:
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strncpy(buf, "alt1", bufsize);
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break;
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case BCM_GPIO_ALT2:
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strncpy(buf, "alt2", bufsize);
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break;
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case BCM_GPIO_ALT3:
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strncpy(buf, "alt3", bufsize);
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break;
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case BCM_GPIO_ALT4:
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strncpy(buf, "alt4", bufsize);
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break;
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case BCM_GPIO_ALT5:
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strncpy(buf, "alt5", bufsize);
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break;
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default:
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strncpy(buf, "invalid", bufsize);
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}
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}
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static int
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bcm_gpio_str_func(char *func, uint32_t *nfunc)
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{
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if (strcasecmp(func, "input") == 0)
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*nfunc = BCM_GPIO_INPUT;
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else if (strcasecmp(func, "output") == 0)
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*nfunc = BCM_GPIO_OUTPUT;
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else if (strcasecmp(func, "alt0") == 0)
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*nfunc = BCM_GPIO_ALT0;
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else if (strcasecmp(func, "alt1") == 0)
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*nfunc = BCM_GPIO_ALT1;
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else if (strcasecmp(func, "alt2") == 0)
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*nfunc = BCM_GPIO_ALT2;
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else if (strcasecmp(func, "alt3") == 0)
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*nfunc = BCM_GPIO_ALT3;
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else if (strcasecmp(func, "alt4") == 0)
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*nfunc = BCM_GPIO_ALT4;
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else if (strcasecmp(func, "alt5") == 0)
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*nfunc = BCM_GPIO_ALT5;
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else
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return (-1);
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return (0);
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}
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static uint32_t
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bcm_gpio_func_flag(uint32_t nfunc)
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{
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switch (nfunc) {
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case BCM_GPIO_INPUT:
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return (GPIO_PIN_INPUT);
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case BCM_GPIO_OUTPUT:
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return (GPIO_PIN_OUTPUT);
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}
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return (0);
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}
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static void
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bcm_gpio_set_function(struct bcm_gpio_softc *sc, uint32_t pin, uint32_t f)
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{
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uint32_t bank, data, offset;
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/* Must be called with lock held. */
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BCM_GPIO_LOCK_ASSERT(sc);
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/* Five banks, 10 pins per bank, 3 bits per pin. */
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bank = pin / 10;
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offset = (pin - bank * 10) * 3;
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data = BCM_GPIO_READ(sc, BCM_GPIO_GPFSEL(bank));
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data &= ~(7 << offset);
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data |= (f << offset);
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BCM_GPIO_WRITE(sc, BCM_GPIO_GPFSEL(bank), data);
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}
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static void
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bcm_gpio_set_pud(struct bcm_gpio_softc *sc, uint32_t pin, uint32_t state)
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{
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uint32_t bank, offset;
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/* Must be called with lock held. */
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BCM_GPIO_LOCK_ASSERT(sc);
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bank = pin / 32;
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offset = pin - 32 * bank;
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BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUD(0), state);
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BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), (1 << offset));
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BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUD(0), 0);
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BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), 0);
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}
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void
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bcm_gpio_set_alternate(device_t dev, uint32_t pin, uint32_t nfunc)
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{
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struct bcm_gpio_softc *sc;
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int i;
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sc = device_get_softc(dev);
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BCM_GPIO_LOCK(sc);
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/* Disable pull-up or pull-down on pin. */
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bcm_gpio_set_pud(sc, pin, BCM_GPIO_NONE);
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/* And now set the pin function. */
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bcm_gpio_set_function(sc, pin, nfunc);
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/* Update the pin flags. */
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i < sc->sc_gpio_npins)
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sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(nfunc);
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BCM_GPIO_UNLOCK(sc);
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}
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static void
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bcm_gpio_pin_configure(struct bcm_gpio_softc *sc, struct gpio_pin *pin,
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unsigned int flags)
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{
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BCM_GPIO_LOCK(sc);
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/*
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* Manage input/output.
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*/
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if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
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pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
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if (flags & GPIO_PIN_OUTPUT) {
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pin->gp_flags |= GPIO_PIN_OUTPUT;
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bcm_gpio_set_function(sc, pin->gp_pin,
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BCM_GPIO_OUTPUT);
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} else {
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pin->gp_flags |= GPIO_PIN_INPUT;
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bcm_gpio_set_function(sc, pin->gp_pin,
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BCM_GPIO_INPUT);
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}
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}
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/* Manage Pull-up/pull-down. */
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pin->gp_flags &= ~(GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN);
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if (flags & (GPIO_PIN_PULLUP|GPIO_PIN_PULLDOWN)) {
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if (flags & GPIO_PIN_PULLUP) {
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pin->gp_flags |= GPIO_PIN_PULLUP;
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bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_PULLUP);
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} else {
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pin->gp_flags |= GPIO_PIN_PULLDOWN;
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bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_PULLDOWN);
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}
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} else
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bcm_gpio_set_pud(sc, pin->gp_pin, BCM_GPIO_NONE);
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BCM_GPIO_UNLOCK(sc);
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}
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static int
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bcm_gpio_pin_max(device_t dev, int *maxpin)
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{
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*maxpin = BCM_GPIO_PINS - 1;
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return (0);
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}
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static int
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bcm_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct bcm_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->sc_gpio_npins)
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return (EINVAL);
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BCM_GPIO_LOCK(sc);
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*caps = sc->sc_gpio_pins[i].gp_caps;
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BCM_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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bcm_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
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{
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struct bcm_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->sc_gpio_npins)
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return (EINVAL);
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BCM_GPIO_LOCK(sc);
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*flags = sc->sc_gpio_pins[i].gp_flags;
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BCM_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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bcm_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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struct bcm_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->sc_gpio_npins)
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return (EINVAL);
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BCM_GPIO_LOCK(sc);
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memcpy(name, sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME);
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BCM_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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bcm_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct bcm_gpio_softc *sc = device_get_softc(dev);
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int i;
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->sc_gpio_npins)
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return (EINVAL);
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/* We never touch on read-only/reserved pins. */
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if (bcm_gpio_pin_is_ro(sc, pin))
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return (EINVAL);
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bcm_gpio_pin_configure(sc, &sc->sc_gpio_pins[i], flags);
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return (0);
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}
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static int
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bcm_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
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{
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struct bcm_gpio_softc *sc = device_get_softc(dev);
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uint32_t bank, offset;
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int i;
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->sc_gpio_npins)
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return (EINVAL);
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/* We never write to read-only/reserved pins. */
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if (bcm_gpio_pin_is_ro(sc, pin))
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return (EINVAL);
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bank = pin / 32;
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offset = pin - 32 * bank;
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BCM_GPIO_LOCK(sc);
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if (value)
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BCM_GPIO_WRITE(sc, BCM_GPIO_GPSET(bank), (1 << offset));
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else
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BCM_GPIO_WRITE(sc, BCM_GPIO_GPCLR(bank), (1 << offset));
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BCM_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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bcm_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
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{
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struct bcm_gpio_softc *sc = device_get_softc(dev);
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uint32_t bank, offset, reg_data;
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int i;
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->sc_gpio_npins)
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return (EINVAL);
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bank = pin / 32;
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offset = pin - 32 * bank;
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BCM_GPIO_LOCK(sc);
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reg_data = BCM_GPIO_READ(sc, BCM_GPIO_GPLEV(bank));
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BCM_GPIO_UNLOCK(sc);
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*val = (reg_data & (1 << offset)) ? 1 : 0;
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return (0);
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}
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static int
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bcm_gpio_pin_toggle(device_t dev, uint32_t pin)
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{
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struct bcm_gpio_softc *sc = device_get_softc(dev);
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uint32_t bank, data, offset;
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int i;
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for (i = 0; i < sc->sc_gpio_npins; i++) {
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if (sc->sc_gpio_pins[i].gp_pin == pin)
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break;
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}
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if (i >= sc->sc_gpio_npins)
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return (EINVAL);
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/* We never write to read-only/reserved pins. */
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if (bcm_gpio_pin_is_ro(sc, pin))
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return (EINVAL);
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bank = pin / 32;
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offset = pin - 32 * bank;
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BCM_GPIO_LOCK(sc);
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data = BCM_GPIO_READ(sc, BCM_GPIO_GPLEV(bank));
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if (data & (1 << offset))
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BCM_GPIO_WRITE(sc, BCM_GPIO_GPCLR(bank), (1 << offset));
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else
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BCM_GPIO_WRITE(sc, BCM_GPIO_GPSET(bank), (1 << offset));
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BCM_GPIO_UNLOCK(sc);
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return (0);
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}
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static int
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bcm_gpio_get_ro_pins(struct bcm_gpio_softc *sc)
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{
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int i, len;
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pcell_t pins[BCM_GPIO_PINS];
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phandle_t gpio;
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/* Find the gpio node to start. */
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gpio = ofw_bus_get_node(sc->sc_dev);
|
|
|
|
len = OF_getproplen(gpio, "broadcom,read-only");
|
|
if (len < 0 || len > sizeof(pins))
|
|
return (-1);
|
|
|
|
if (OF_getprop(gpio, "broadcom,read-only", &pins, len) < 0)
|
|
return (-1);
|
|
|
|
sc->sc_ro_npins = len / sizeof(pcell_t);
|
|
|
|
device_printf(sc->sc_dev, "read-only pins: ");
|
|
for (i = 0; i < sc->sc_ro_npins; i++) {
|
|
sc->sc_ro_pins[i] = fdt32_to_cpu(pins[i]);
|
|
if (i > 0)
|
|
printf(",");
|
|
printf("%d", sc->sc_ro_pins[i]);
|
|
}
|
|
if (i > 0)
|
|
printf(".");
|
|
printf("\n");
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
bcm_gpio_func_proc(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
char buf[16];
|
|
struct bcm_gpio_softc *sc;
|
|
struct bcm_gpio_sysctl *sc_sysctl;
|
|
uint32_t nfunc;
|
|
int error;
|
|
|
|
sc_sysctl = arg1;
|
|
sc = sc_sysctl->sc;
|
|
|
|
/* Get the current pin function. */
|
|
nfunc = bcm_gpio_get_function(sc, sc_sysctl->pin);
|
|
bcm_gpio_func_str(nfunc, buf, sizeof(buf));
|
|
|
|
error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
|
|
if (error != 0 || req->newptr == NULL)
|
|
return (error);
|
|
|
|
/* Parse the user supplied string and check for a valid pin function. */
|
|
if (bcm_gpio_str_func(buf, &nfunc) != 0)
|
|
return (EINVAL);
|
|
|
|
/* Update the pin alternate function. */
|
|
bcm_gpio_set_alternate(sc->sc_dev, sc_sysctl->pin, nfunc);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static void
|
|
bcm_gpio_sysctl_init(struct bcm_gpio_softc *sc)
|
|
{
|
|
char pinbuf[3];
|
|
struct bcm_gpio_sysctl *sc_sysctl;
|
|
struct sysctl_ctx_list *ctx;
|
|
struct sysctl_oid *tree_node, *pin_node, *pinN_node;
|
|
struct sysctl_oid_list *tree, *pin_tree, *pinN_tree;
|
|
int i;
|
|
|
|
/*
|
|
* Add per-pin sysctl tree/handlers.
|
|
*/
|
|
ctx = device_get_sysctl_ctx(sc->sc_dev);
|
|
tree_node = device_get_sysctl_tree(sc->sc_dev);
|
|
tree = SYSCTL_CHILDREN(tree_node);
|
|
pin_node = SYSCTL_ADD_NODE(ctx, tree, OID_AUTO, "pin",
|
|
CTLFLAG_RD, NULL, "GPIO Pins");
|
|
pin_tree = SYSCTL_CHILDREN(pin_node);
|
|
|
|
for (i = 0; i < sc->sc_gpio_npins; i++) {
|
|
|
|
snprintf(pinbuf, sizeof(pinbuf), "%d", i);
|
|
pinN_node = SYSCTL_ADD_NODE(ctx, pin_tree, OID_AUTO, pinbuf,
|
|
CTLFLAG_RD, NULL, "GPIO Pin");
|
|
pinN_tree = SYSCTL_CHILDREN(pinN_node);
|
|
|
|
sc->sc_sysctl[i].sc = sc;
|
|
sc_sysctl = &sc->sc_sysctl[i];
|
|
sc_sysctl->sc = sc;
|
|
sc_sysctl->pin = sc->sc_gpio_pins[i].gp_pin;
|
|
SYSCTL_ADD_PROC(ctx, pinN_tree, OID_AUTO, "function",
|
|
CTLFLAG_RW | CTLTYPE_STRING, sc_sysctl,
|
|
sizeof(struct bcm_gpio_sysctl), bcm_gpio_func_proc,
|
|
"A", "Pin Function");
|
|
}
|
|
}
|
|
|
|
static int
|
|
bcm_gpio_get_reserved_pins(struct bcm_gpio_softc *sc)
|
|
{
|
|
int i, j, len, npins;
|
|
pcell_t pins[BCM_GPIO_PINS];
|
|
phandle_t gpio, node, reserved;
|
|
char name[32];
|
|
|
|
/* Get read-only pins. */
|
|
if (bcm_gpio_get_ro_pins(sc) != 0)
|
|
return (-1);
|
|
|
|
/* Find the gpio/reserved pins node to start. */
|
|
gpio = ofw_bus_get_node(sc->sc_dev);
|
|
node = OF_child(gpio);
|
|
|
|
/*
|
|
* Find reserved node
|
|
*/
|
|
reserved = 0;
|
|
while ((node != 0) && (reserved == 0)) {
|
|
len = OF_getprop(node, "name", name,
|
|
sizeof(name) - 1);
|
|
name[len] = 0;
|
|
if (strcmp(name, "reserved") == 0)
|
|
reserved = node;
|
|
node = OF_peer(node);
|
|
}
|
|
|
|
if (reserved == 0)
|
|
return (-1);
|
|
|
|
/* Get the reserved pins. */
|
|
len = OF_getproplen(reserved, "broadcom,pins");
|
|
if (len < 0 || len > sizeof(pins))
|
|
return (-1);
|
|
|
|
if (OF_getprop(reserved, "broadcom,pins", &pins, len) < 0)
|
|
return (-1);
|
|
|
|
npins = len / sizeof(pcell_t);
|
|
|
|
j = 0;
|
|
device_printf(sc->sc_dev, "reserved pins: ");
|
|
for (i = 0; i < npins; i++) {
|
|
if (i > 0)
|
|
printf(",");
|
|
printf("%d", fdt32_to_cpu(pins[i]));
|
|
/* Some pins maybe already on the list of read-only pins. */
|
|
if (bcm_gpio_pin_is_ro(sc, fdt32_to_cpu(pins[i])))
|
|
continue;
|
|
sc->sc_ro_pins[j++ + sc->sc_ro_npins] = fdt32_to_cpu(pins[i]);
|
|
}
|
|
sc->sc_ro_npins += j;
|
|
if (i > 0)
|
|
printf(".");
|
|
printf("\n");
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
bcm_gpio_probe(device_t dev)
|
|
{
|
|
|
|
if (!ofw_bus_status_okay(dev))
|
|
return (ENXIO);
|
|
|
|
if (!ofw_bus_is_compatible(dev, "broadcom,bcm2835-gpio"))
|
|
return (ENXIO);
|
|
|
|
device_set_desc(dev, "BCM2708/2835 GPIO controller");
|
|
return (BUS_PROBE_DEFAULT);
|
|
}
|
|
|
|
static int
|
|
bcm_gpio_attach(device_t dev)
|
|
{
|
|
struct bcm_gpio_softc *sc = device_get_softc(dev);
|
|
uint32_t func;
|
|
int i, j, rid;
|
|
phandle_t gpio;
|
|
|
|
sc->sc_dev = dev;
|
|
|
|
mtx_init(&sc->sc_mtx, "bcm gpio", "gpio", MTX_DEF);
|
|
|
|
rid = 0;
|
|
sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
|
RF_ACTIVE);
|
|
if (!sc->sc_mem_res) {
|
|
device_printf(dev, "cannot allocate memory window\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
sc->sc_bst = rman_get_bustag(sc->sc_mem_res);
|
|
sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res);
|
|
|
|
rid = 0;
|
|
sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
|
|
RF_ACTIVE);
|
|
if (!sc->sc_irq_res) {
|
|
bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
|
|
device_printf(dev, "cannot allocate interrupt\n");
|
|
return (ENXIO);
|
|
}
|
|
|
|
/* Find our node. */
|
|
gpio = ofw_bus_get_node(sc->sc_dev);
|
|
|
|
if (!OF_hasprop(gpio, "gpio-controller"))
|
|
/* Node is not a GPIO controller. */
|
|
goto fail;
|
|
|
|
/*
|
|
* Find the read-only pins. These are pins we never touch or bad
|
|
* things could happen.
|
|
*/
|
|
if (bcm_gpio_get_reserved_pins(sc) == -1)
|
|
goto fail;
|
|
|
|
/* Initialize the software controlled pins. */
|
|
for (i = 0, j = 0; j < BCM_GPIO_PINS; j++) {
|
|
if (bcm_gpio_pin_is_ro(sc, j))
|
|
continue;
|
|
snprintf(sc->sc_gpio_pins[i].gp_name, GPIOMAXNAME,
|
|
"pin %d", j);
|
|
func = bcm_gpio_get_function(sc, j);
|
|
sc->sc_gpio_pins[i].gp_pin = j;
|
|
sc->sc_gpio_pins[i].gp_caps = BCM_GPIO_DEFAULT_CAPS;
|
|
sc->sc_gpio_pins[i].gp_flags = bcm_gpio_func_flag(func);
|
|
i++;
|
|
}
|
|
sc->sc_gpio_npins = i;
|
|
|
|
bcm_gpio_sysctl_init(sc);
|
|
|
|
device_add_child(dev, "gpioc", -1);
|
|
device_add_child(dev, "gpiobus", -1);
|
|
|
|
return (bus_generic_attach(dev));
|
|
|
|
fail:
|
|
if (sc->sc_irq_res)
|
|
bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
|
|
if (sc->sc_mem_res)
|
|
bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
|
|
return (ENXIO);
|
|
}
|
|
|
|
static int
|
|
bcm_gpio_detach(device_t dev)
|
|
{
|
|
|
|
return (EBUSY);
|
|
}
|
|
|
|
static phandle_t
|
|
bcm_gpio_get_node(device_t bus, device_t dev)
|
|
{
|
|
|
|
/* We only have one child, the GPIO bus, which needs our own node. */
|
|
return (ofw_bus_get_node(bus));
|
|
}
|
|
|
|
static device_method_t bcm_gpio_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, bcm_gpio_probe),
|
|
DEVMETHOD(device_attach, bcm_gpio_attach),
|
|
DEVMETHOD(device_detach, bcm_gpio_detach),
|
|
|
|
/* GPIO protocol */
|
|
DEVMETHOD(gpio_pin_max, bcm_gpio_pin_max),
|
|
DEVMETHOD(gpio_pin_getname, bcm_gpio_pin_getname),
|
|
DEVMETHOD(gpio_pin_getflags, bcm_gpio_pin_getflags),
|
|
DEVMETHOD(gpio_pin_getcaps, bcm_gpio_pin_getcaps),
|
|
DEVMETHOD(gpio_pin_setflags, bcm_gpio_pin_setflags),
|
|
DEVMETHOD(gpio_pin_get, bcm_gpio_pin_get),
|
|
DEVMETHOD(gpio_pin_set, bcm_gpio_pin_set),
|
|
DEVMETHOD(gpio_pin_toggle, bcm_gpio_pin_toggle),
|
|
|
|
/* ofw_bus interface */
|
|
DEVMETHOD(ofw_bus_get_node, bcm_gpio_get_node),
|
|
|
|
DEVMETHOD_END
|
|
};
|
|
|
|
static devclass_t bcm_gpio_devclass;
|
|
|
|
static driver_t bcm_gpio_driver = {
|
|
"gpio",
|
|
bcm_gpio_methods,
|
|
sizeof(struct bcm_gpio_softc),
|
|
};
|
|
|
|
DRIVER_MODULE(bcm_gpio, simplebus, bcm_gpio_driver, bcm_gpio_devclass, 0, 0);
|