f615ab2eb3
This adds new feature support for the 82599, a hardware assist to LRO, doing this required a large revamp to the RX cleanup code because the descriptor ring may not be processed out of order, this necessitated the elimination of global pointers. Additionally, the RX routine now does not refresh mbufs on every descriptor, rather it will do a range, and then update the hardware pointer at that time. These are performance oriented changes. The TX side now has a cleaner simpler watchdog algorithm as well, in TX cleanup a read of ticks is stored, that can then be compared in local_timer to determine if there is a hang. Various other cleanups along the way, thanks to all who have provided input and testing.
163 lines
5.3 KiB
C
163 lines
5.3 KiB
C
/******************************************************************************
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Copyright (c) 2001-2009, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#ifndef _IXGBE_OS_H_
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#define _IXGBE_OS_H_
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/clock.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#define ASSERT(x) if(!(x)) panic("IXGBE: x")
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/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
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#define usec_delay(x) DELAY(x)
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#define msec_delay(x) DELAY(1000*(x))
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#define DBG 0
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#define MSGOUT(S, A, B) printf(S "\n", A, B)
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#define DEBUGFUNC(F) DEBUGOUT(F);
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#if DBG
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#define DEBUGOUT(S) printf(S "\n")
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#define DEBUGOUT1(S,A) printf(S "\n",A)
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#define DEBUGOUT2(S,A,B) printf(S "\n",A,B)
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#define DEBUGOUT3(S,A,B,C) printf(S "\n",A,B,C)
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#define DEBUGOUT7(S,A,B,C,D,E,F,G) printf(S "\n",A,B,C,D,E,F,G)
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#else
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#define DEBUGOUT(S)
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#define DEBUGOUT1(S,A)
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#define DEBUGOUT2(S,A,B)
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#define DEBUGOUT3(S,A,B,C)
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#define DEBUGOUT6(S,A,B,C,D,E,F)
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#define DEBUGOUT7(S,A,B,C,D,E,F,G)
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#endif
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#define FALSE 0
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#define false 0 /* shared code requires this */
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#define TRUE 1
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#define true 1
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#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
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#define PCI_COMMAND_REGISTER PCIR_COMMAND
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#define UNREFERENCED_PARAMETER(_p)
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#define IXGBE_HTONL htonl
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typedef uint8_t u8;
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typedef int8_t s8;
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typedef uint16_t u16;
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typedef uint32_t u32;
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typedef int32_t s32;
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typedef uint64_t u64;
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typedef boolean_t bool;
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#define le16_to_cpu
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#if __FreeBSD_version < 800000
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#if defined(__i386__) || defined(__amd64__)
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#define mb() __asm volatile("mfence" ::: "memory")
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#define wmb() __asm volatile("sfence" ::: "memory")
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#define rmb() __asm volatile("lfence" ::: "memory")
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#else
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#define mb()
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#define rmb()
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#define wmb()
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#endif
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#endif
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#if defined(__i386__) || defined(__amd64__)
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static __inline
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void prefetch(void *x)
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{
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__asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
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}
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#else
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#define prefetch(x)
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#endif
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struct ixgbe_osdep
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{
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bus_space_tag_t mem_bus_space_tag;
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bus_space_handle_t mem_bus_space_handle;
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struct device *dev;
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};
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/* These routines are needed by the shared code */
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struct ixgbe_hw;
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extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
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#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
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extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
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#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
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#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
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#define IXGBE_READ_REG(a, reg) (\
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bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
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((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
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reg))
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#define IXGBE_WRITE_REG(a, reg, value) (\
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bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
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((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
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reg, value))
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#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
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bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
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((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
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(reg + ((offset) << 2))))
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#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
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bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
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((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
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(reg + ((offset) << 2)), value))
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#endif /* _IXGBE_OS_H_ */
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