d416db42ae
in order to unbreak arm make world. The right way to do it with soft floats will be figured out later. Discussed with: das
201 lines
4.1 KiB
C
201 lines
4.1 KiB
C
/*-
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* Copyright (c) 2004 David Schultz <das@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _FENV_H_
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#define _FENV_H_
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#include <sys/_types.h>
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typedef __uint32_t fenv_t;
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typedef __uint32_t fexcept_t;
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/* Exception flags */
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#define FE_INVALID 0x0001
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#define FE_DIVBYZERO 0x0002
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#define FE_OVERFLOW 0x0004
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#define FE_UNDERFLOW 0x0008
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#define FE_INEXACT 0x0010
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#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
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FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
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__BEGIN_DECLS
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/* Default floating-point environment */
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extern const fenv_t __fe_dfl_env;
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#define FE_DFL_ENV (&__fe_dfl_env)
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/* We need to be able to map status flag positions to mask flag positions */
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#define _FPUSW_SHIFT 16
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#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
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#ifdef ARM_HARD_FLOAT
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#define __rfs(__fpsr) __asm("rfs %0" : "=r" (*(__fpsr)))
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#define __wfs(__fpsr) __asm __volatile("wfs %0" : : "r" (__fpsr))
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#else
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#define __rfs(__fpsr)
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#define __wfs(__fpsr)
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#endif
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static __inline int
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feclearexcept(int __excepts)
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{
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fexcept_t __fpsr;
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__rfs(&__fpsr);
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__fpsr &= ~__excepts;
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__wfs(__fpsr);
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return (0);
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}
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static __inline int
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fegetexceptflag(fexcept_t *__flagp, int __excepts)
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{
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fexcept_t __fpsr;
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__rfs(&__fpsr);
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*__flagp = __fpsr & __excepts;
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return (0);
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}
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static __inline int
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fesetexceptflag(const fexcept_t *__flagp, int __excepts)
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{
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fexcept_t __fpsr;
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__rfs(&__fpsr);
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__fpsr &= ~__excepts;
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__fpsr |= *__flagp & __excepts;
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__wfs(__fpsr);
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return (0);
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}
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static __inline int
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feraiseexcept(int __excepts)
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{
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fexcept_t __ex = __excepts;
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fesetexceptflag(&__ex, __excepts); /* XXX */
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return (0);
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}
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static __inline int
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fetestexcept(int __excepts)
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{
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fexcept_t __fpsr;
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__rfs(&__fpsr);
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return (__fpsr & __excepts);
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}
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static __inline int
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fegetround(void)
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{
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/*
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* Apparently, the rounding mode is specified as part of the
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* instruction format on ARM, so the dynamic rounding mode is
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* indeterminate. Some FPUs may differ.
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*/
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return (-1);
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}
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static __inline int
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fesetround(int __round)
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{
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return (-1);
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}
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static __inline int
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fegetenv(fenv_t *__envp)
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{
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__rfs(__envp);
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return (0);
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}
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static __inline int
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feholdexcept(fenv_t *__envp)
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{
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fenv_t __env;
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__rfs(&__env);
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*__envp = __env;
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__env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
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__wfs(__env);
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return (0);
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}
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static __inline int
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fesetenv(const fenv_t *__envp)
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{
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__wfs(*__envp);
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return (0);
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}
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static __inline int
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feupdateenv(const fenv_t *__envp)
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{
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fexcept_t __fpsr;
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__rfs(&__fpsr);
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__wfs(*__envp);
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feraiseexcept(__fpsr & FE_ALL_EXCEPT);
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return (0);
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}
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#if __BSD_VISIBLE
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static __inline int
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fesetmask(int __mask)
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{
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fenv_t __fpsr;
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__rfs(&__fpsr);
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__fpsr &= ~_ENABLE_MASK;
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__fpsr |= __mask << _FPUSW_SHIFT;
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__wfs(__fpsr);
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return (0);
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}
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static __inline int
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fegetmask(void)
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{
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fenv_t __fpsr;
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__rfs(&__fpsr);
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return ((__fpsr & _ENABLE_MASK) >> _FPUSW_SHIFT);
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}
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#endif /* __BSD_VISIBLE */
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__END_DECLS
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#endif /* !_FENV_H_ */
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