951e058411
o Add an experimental IOMMU support to xDMA framework The BERI IOMMU device is the part of CHERI device-model project [1]. It translates memory addresses for various BERI peripherals modelled in software. It accepts FreeBSD/mips64 page directories format and manages BERI TLB. 1. https://github.com/CTSRD-CHERI/device-model Sponsored by: DARPA, AFRL
544 lines
12 KiB
C
544 lines
12 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2016-2019 Ruslan Bukin <br@bsdpad.com>
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/queue.h>
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#include <sys/kobj.h>
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#include <sys/malloc.h>
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#include <sys/limits.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/sysctl.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#ifdef FDT
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#endif
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#include <dev/xdma/xdma.h>
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#include <xdma_if.h>
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/*
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* Multiple xDMA controllers may work with single DMA device,
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* so we have global lock for physical channel management.
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*/
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static struct mtx xdma_mtx;
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#define XDMA_LOCK() mtx_lock(&xdma_mtx)
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#define XDMA_UNLOCK() mtx_unlock(&xdma_mtx)
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#define XDMA_ASSERT_LOCKED() mtx_assert(&xdma_mtx, MA_OWNED)
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#define FDT_REG_CELLS 4
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#ifdef FDT
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static int
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xdma_get_iommu_fdt(xdma_controller_t *xdma, xdma_channel_t *xchan)
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{
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struct xdma_iommu *xio;
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phandle_t node;
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pcell_t prop;
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size_t len;
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node = ofw_bus_get_node(xdma->dma_dev);
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if (OF_getproplen(node, "xdma,iommu") <= 0)
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return (0);
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len = OF_getencprop(node, "xdma,iommu", &prop, sizeof(prop));
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if (len != sizeof(prop)) {
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device_printf(xdma->dev,
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"%s: Can't get iommu device node\n", __func__);
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return (0);
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}
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xio = &xchan->xio;
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xio->dev = OF_device_from_xref(prop);
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if (xio->dev == NULL) {
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device_printf(xdma->dev,
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"%s: Can't get iommu device\n", __func__);
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return (0);
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}
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/* Found */
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return (1);
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}
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#endif
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/*
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* Allocate virtual xDMA channel.
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*/
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xdma_channel_t *
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xdma_channel_alloc(xdma_controller_t *xdma, uint32_t caps)
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{
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xdma_channel_t *xchan;
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int ret;
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xchan = malloc(sizeof(xdma_channel_t), M_XDMA, M_WAITOK | M_ZERO);
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xchan->xdma = xdma;
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#ifdef FDT
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/* Check if this DMA controller supports IOMMU. */
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if (xdma_get_iommu_fdt(xdma, xchan))
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caps |= XCHAN_CAP_IOMMU | XCHAN_CAP_NOSEG;
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#endif
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xchan->caps = caps;
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XDMA_LOCK();
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/* Request a real channel from hardware driver. */
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ret = XDMA_CHANNEL_ALLOC(xdma->dma_dev, xchan);
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if (ret != 0) {
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device_printf(xdma->dev,
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"%s: Can't request hardware channel.\n", __func__);
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XDMA_UNLOCK();
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free(xchan, M_XDMA);
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return (NULL);
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}
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TAILQ_INIT(&xchan->ie_handlers);
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mtx_init(&xchan->mtx_lock, "xDMA chan", NULL, MTX_DEF);
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mtx_init(&xchan->mtx_qin_lock, "xDMA qin", NULL, MTX_DEF);
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mtx_init(&xchan->mtx_qout_lock, "xDMA qout", NULL, MTX_DEF);
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mtx_init(&xchan->mtx_bank_lock, "xDMA bank", NULL, MTX_DEF);
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mtx_init(&xchan->mtx_proc_lock, "xDMA proc", NULL, MTX_DEF);
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TAILQ_INIT(&xchan->bank);
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TAILQ_INIT(&xchan->queue_in);
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TAILQ_INIT(&xchan->queue_out);
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TAILQ_INIT(&xchan->processing);
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if (xchan->caps & XCHAN_CAP_IOMMU)
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xdma_iommu_init(&xchan->xio);
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TAILQ_INSERT_TAIL(&xdma->channels, xchan, xchan_next);
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XDMA_UNLOCK();
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return (xchan);
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}
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int
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xdma_channel_free(xdma_channel_t *xchan)
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{
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xdma_controller_t *xdma;
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int err;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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XDMA_LOCK();
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/* Free the real DMA channel. */
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err = XDMA_CHANNEL_FREE(xdma->dma_dev, xchan);
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if (err != 0) {
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device_printf(xdma->dev,
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"%s: Can't free real hw channel.\n", __func__);
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XDMA_UNLOCK();
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return (-1);
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}
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if (xchan->flags & XCHAN_TYPE_SG)
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xdma_channel_free_sg(xchan);
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if (xchan->caps & XCHAN_CAP_IOMMU)
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xdma_iommu_release(&xchan->xio);
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xdma_teardown_all_intr(xchan);
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mtx_destroy(&xchan->mtx_lock);
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mtx_destroy(&xchan->mtx_qin_lock);
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mtx_destroy(&xchan->mtx_qout_lock);
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mtx_destroy(&xchan->mtx_bank_lock);
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mtx_destroy(&xchan->mtx_proc_lock);
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TAILQ_REMOVE(&xdma->channels, xchan, xchan_next);
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free(xchan, M_XDMA);
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XDMA_UNLOCK();
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return (0);
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}
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int
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xdma_setup_intr(xdma_channel_t *xchan,
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int (*cb)(void *, xdma_transfer_status_t *),
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void *arg, void **ihandler)
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{
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struct xdma_intr_handler *ih;
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xdma_controller_t *xdma;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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/* Sanity check. */
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if (cb == NULL) {
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device_printf(xdma->dev,
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"%s: Can't setup interrupt handler.\n",
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__func__);
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return (-1);
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}
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ih = malloc(sizeof(struct xdma_intr_handler),
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M_XDMA, M_WAITOK | M_ZERO);
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ih->cb = cb;
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ih->cb_user = arg;
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XCHAN_LOCK(xchan);
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TAILQ_INSERT_TAIL(&xchan->ie_handlers, ih, ih_next);
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XCHAN_UNLOCK(xchan);
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if (ihandler != NULL)
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*ihandler = ih;
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return (0);
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}
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int
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xdma_teardown_intr(xdma_channel_t *xchan, struct xdma_intr_handler *ih)
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{
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xdma_controller_t *xdma;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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/* Sanity check. */
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if (ih == NULL) {
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device_printf(xdma->dev,
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"%s: Can't teardown interrupt.\n", __func__);
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return (-1);
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}
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TAILQ_REMOVE(&xchan->ie_handlers, ih, ih_next);
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free(ih, M_XDMA);
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return (0);
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}
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int
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xdma_teardown_all_intr(xdma_channel_t *xchan)
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{
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struct xdma_intr_handler *ih_tmp;
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struct xdma_intr_handler *ih;
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xdma_controller_t *xdma;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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TAILQ_FOREACH_SAFE(ih, &xchan->ie_handlers, ih_next, ih_tmp) {
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TAILQ_REMOVE(&xchan->ie_handlers, ih, ih_next);
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free(ih, M_XDMA);
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}
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return (0);
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}
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int
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xdma_request(xdma_channel_t *xchan, struct xdma_request *req)
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{
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xdma_controller_t *xdma;
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int ret;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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XCHAN_LOCK(xchan);
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ret = XDMA_CHANNEL_REQUEST(xdma->dma_dev, xchan, req);
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if (ret != 0) {
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device_printf(xdma->dev,
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"%s: Can't request a transfer.\n", __func__);
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XCHAN_UNLOCK(xchan);
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return (-1);
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}
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XCHAN_UNLOCK(xchan);
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return (0);
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}
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int
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xdma_control(xdma_channel_t *xchan, enum xdma_command cmd)
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{
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xdma_controller_t *xdma;
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int ret;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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ret = XDMA_CHANNEL_CONTROL(xdma->dma_dev, xchan, cmd);
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if (ret != 0) {
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device_printf(xdma->dev,
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"%s: Can't process command.\n", __func__);
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return (-1);
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}
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return (0);
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}
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void
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xdma_callback(xdma_channel_t *xchan, xdma_transfer_status_t *status)
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{
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struct xdma_intr_handler *ih_tmp;
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struct xdma_intr_handler *ih;
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xdma_controller_t *xdma;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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TAILQ_FOREACH_SAFE(ih, &xchan->ie_handlers, ih_next, ih_tmp)
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if (ih->cb != NULL)
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ih->cb(ih->cb_user, status);
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if (xchan->flags & XCHAN_TYPE_SG)
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xdma_queue_submit(xchan);
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}
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#ifdef FDT
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/*
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* Notify the DMA driver we have machine-dependent data in FDT.
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*/
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static int
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xdma_ofw_md_data(xdma_controller_t *xdma, pcell_t *cells, int ncells)
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{
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uint32_t ret;
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ret = XDMA_OFW_MD_DATA(xdma->dma_dev,
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cells, ncells, (void **)&xdma->data);
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return (ret);
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}
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int
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xdma_handle_mem_node(vmem_t *vmem, phandle_t memory)
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{
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pcell_t reg[FDT_REG_CELLS * FDT_MEM_REGIONS];
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pcell_t *regp;
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int addr_cells, size_cells;
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int i, reg_len, ret, tuple_size, tuples;
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u_long mem_start, mem_size;
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if ((ret = fdt_addrsize_cells(OF_parent(memory), &addr_cells,
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&size_cells)) != 0)
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return (ret);
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if (addr_cells > 2)
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return (ERANGE);
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tuple_size = sizeof(pcell_t) * (addr_cells + size_cells);
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reg_len = OF_getproplen(memory, "reg");
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if (reg_len <= 0 || reg_len > sizeof(reg))
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return (ERANGE);
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if (OF_getprop(memory, "reg", reg, reg_len) <= 0)
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return (ENXIO);
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tuples = reg_len / tuple_size;
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regp = (pcell_t *)®
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for (i = 0; i < tuples; i++) {
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ret = fdt_data_to_res(regp, addr_cells, size_cells,
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&mem_start, &mem_size);
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if (ret != 0)
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return (ret);
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vmem_add(vmem, mem_start, mem_size, 0);
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regp += addr_cells + size_cells;
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}
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return (0);
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}
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vmem_t *
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xdma_get_memory(device_t dev)
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{
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phandle_t mem_node, node;
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pcell_t mem_handle;
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vmem_t *vmem;
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node = ofw_bus_get_node(dev);
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if (node <= 0) {
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device_printf(dev,
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"%s called on not ofw based device.\n", __func__);
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return (NULL);
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}
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if (!OF_hasprop(node, "memory-region"))
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return (NULL);
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if (OF_getencprop(node, "memory-region", (void *)&mem_handle,
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sizeof(mem_handle)) <= 0)
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return (NULL);
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vmem = vmem_create("xDMA vmem", 0, 0, PAGE_SIZE,
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PAGE_SIZE, M_BESTFIT | M_WAITOK);
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if (vmem == NULL)
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return (NULL);
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mem_node = OF_node_from_xref(mem_handle);
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if (xdma_handle_mem_node(vmem, mem_node) != 0) {
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vmem_destroy(vmem);
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return (NULL);
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}
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return (vmem);
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}
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void
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xdma_put_memory(vmem_t *vmem)
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{
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vmem_destroy(vmem);
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}
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void
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xchan_set_memory(xdma_channel_t *xchan, vmem_t *vmem)
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{
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xchan->vmem = vmem;
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}
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/*
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* Allocate xdma controller.
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*/
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xdma_controller_t *
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xdma_ofw_get(device_t dev, const char *prop)
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{
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phandle_t node, parent;
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xdma_controller_t *xdma;
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device_t dma_dev;
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pcell_t *cells;
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int ncells;
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int error;
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int ndmas;
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int idx;
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node = ofw_bus_get_node(dev);
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if (node <= 0)
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device_printf(dev,
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"%s called on not ofw based device.\n", __func__);
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error = ofw_bus_parse_xref_list_get_length(node,
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"dmas", "#dma-cells", &ndmas);
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if (error) {
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device_printf(dev,
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"%s can't get dmas list.\n", __func__);
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return (NULL);
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}
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if (ndmas == 0) {
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device_printf(dev,
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"%s dmas list is empty.\n", __func__);
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return (NULL);
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}
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error = ofw_bus_find_string_index(node, "dma-names", prop, &idx);
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if (error != 0) {
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device_printf(dev,
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"%s can't find string index.\n", __func__);
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return (NULL);
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}
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error = ofw_bus_parse_xref_list_alloc(node, "dmas", "#dma-cells",
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idx, &parent, &ncells, &cells);
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if (error != 0) {
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device_printf(dev,
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"%s can't get dma device xref.\n", __func__);
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return (NULL);
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}
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dma_dev = OF_device_from_xref(parent);
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if (dma_dev == NULL) {
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device_printf(dev,
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"%s can't get dma device.\n", __func__);
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return (NULL);
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}
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xdma = malloc(sizeof(struct xdma_controller),
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M_XDMA, M_WAITOK | M_ZERO);
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xdma->dev = dev;
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xdma->dma_dev = dma_dev;
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TAILQ_INIT(&xdma->channels);
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xdma_ofw_md_data(xdma, cells, ncells);
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free(cells, M_OFWPROP);
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return (xdma);
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}
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#endif
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/*
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* Free xDMA controller object.
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*/
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int
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xdma_put(xdma_controller_t *xdma)
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{
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XDMA_LOCK();
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/* Ensure no channels allocated. */
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if (!TAILQ_EMPTY(&xdma->channels)) {
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device_printf(xdma->dev, "%s: Can't free xDMA\n", __func__);
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return (-1);
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}
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free(xdma->data, M_DEVBUF);
|
|
free(xdma, M_XDMA);
|
|
|
|
XDMA_UNLOCK();
|
|
|
|
return (0);
|
|
}
|
|
|
|
static void
|
|
xdma_init(void)
|
|
{
|
|
|
|
mtx_init(&xdma_mtx, "xDMA", NULL, MTX_DEF);
|
|
}
|
|
|
|
SYSINIT(xdma, SI_SUB_DRIVERS, SI_ORDER_FIRST, xdma_init, NULL);
|