f13e5622e8
tree for two or more years now), except in a few places where there's code to be compatible with older versions of FreeBSD.
713 lines
18 KiB
C
713 lines
18 KiB
C
/* $FreeBSD$ */
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/*
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* PCI specific probe and attach routines for LSI Fusion Adapters
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* FreeBSD Version.
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*
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* Copyright (c) 2000, 2001 by Greg Ansley
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* Partially derived from Matt Jacob's ISP driver.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Additional Copyright (c) 2002 by Matthew Jacob under same license.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <machine/bus_memio.h>
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <sys/malloc.h>
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#include <dev/mpt/mpt_freebsd.h>
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#ifndef PCI_VENDOR_LSI
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#define PCI_VENDOR_LSI 0x1000
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#endif
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#ifndef PCI_PRODUCT_LSI_FC909
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#define PCI_PRODUCT_LSI_FC909 0x0620
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#endif
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#ifndef PCI_PRODUCT_LSI_FC909A
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#define PCI_PRODUCT_LSI_FC909A 0x0621
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#endif
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#ifndef PCI_PRODUCT_LSI_FC919
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#define PCI_PRODUCT_LSI_FC919 0x0624
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#endif
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#ifndef PCI_PRODUCT_LSI_FC929
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#define PCI_PRODUCT_LSI_FC929 0x0622
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#endif
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#ifndef PCI_PRODUCT_LSI_1030
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#define PCI_PRODUCT_LSI_1030 0x0030
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#endif
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#ifndef PCIM_CMD_SERRESPEN
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#define PCIM_CMD_SERRESPEN 0x0100
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#endif
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#define MEM_MAP_REG 0x14
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#define MEM_MAP_SRAM 0x1C
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static int mpt_probe(device_t);
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static int mpt_attach(device_t);
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static void mpt_free_bus_resources(mpt_softc_t *mpt);
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static int mpt_detach(device_t);
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static int mpt_shutdown(device_t);
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static int mpt_dma_mem_alloc(mpt_softc_t *mpt);
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static void mpt_dma_mem_free(mpt_softc_t *mpt);
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static void mpt_read_config_regs(mpt_softc_t *mpt);
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static void mpt_pci_intr(void *);
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static device_method_t mpt_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, mpt_probe),
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DEVMETHOD(device_attach, mpt_attach),
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DEVMETHOD(device_detach, mpt_detach),
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DEVMETHOD(device_shutdown, mpt_shutdown),
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{ 0, 0 }
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};
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static driver_t mpt_driver = {
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"mpt", mpt_methods, sizeof (mpt_softc_t)
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};
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static devclass_t mpt_devclass;
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DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
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MODULE_VERSION(mpt, 1);
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int
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mpt_intr(void *dummy)
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{
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int nrepl = 0;
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u_int32_t reply;
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mpt_softc_t *mpt = (mpt_softc_t *)dummy;
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if ((mpt_read(mpt, MPT_OFFSET_INTR_STATUS) & MPT_INTR_REPLY_READY) == 0)
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return (0);
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reply = mpt_pop_reply_queue(mpt);
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while (reply != MPT_REPLY_EMPTY) {
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nrepl++;
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if (mpt->verbose > 1) {
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if ((reply & MPT_CONTEXT_REPLY) != 0) {
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/* Address reply; IOC has something to say */
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mpt_print_reply(MPT_REPLY_PTOV(mpt, reply));
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} else {
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/* Context reply ; all went well */
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mpt_prt(mpt, "context %u reply OK", reply);
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}
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}
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mpt_done(mpt, reply);
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reply = mpt_pop_reply_queue(mpt);
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}
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return (nrepl != 0);
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}
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static int
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mpt_probe(device_t dev)
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{
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char *desc;
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if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
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return (ENXIO);
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switch ((pci_get_device(dev) & ~1)) {
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case PCI_PRODUCT_LSI_FC909:
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desc = "LSILogic FC909 FC Adapter";
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break;
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case PCI_PRODUCT_LSI_FC909A:
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desc = "LSILogic FC909A FC Adapter";
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break;
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case PCI_PRODUCT_LSI_FC919:
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desc = "LSILogic FC919 FC Adapter";
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break;
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case PCI_PRODUCT_LSI_FC929:
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desc = "LSILogic FC929 FC Adapter";
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break;
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case PCI_PRODUCT_LSI_1030:
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desc = "LSILogic 1030 Ultra4 Adapter";
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break;
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default:
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return (ENXIO);
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}
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device_set_desc(dev, desc);
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return (0);
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}
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#ifdef RELENG_4
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static void
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mpt_set_options(mpt_softc_t *mpt)
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{
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int bitmap;
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bitmap = 0;
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if (getenv_int("mpt_disable", &bitmap)) {
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if (bitmap & (1 << mpt->unit)) {
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mpt->disabled = 1;
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}
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}
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bitmap = 0;
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if (getenv_int("mpt_debug", &bitmap)) {
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if (bitmap & (1 << mpt->unit)) {
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mpt->verbose = 2;
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}
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}
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}
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#else
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static void
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mpt_set_options(mpt_softc_t *mpt)
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{
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int tval;
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tval = 0;
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if (resource_int_value(device_get_name(mpt->dev),
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device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
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mpt->disabled = 1;
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}
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tval = 0;
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if (resource_int_value(device_get_name(mpt->dev),
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device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
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mpt->verbose += tval;
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}
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}
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#endif
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static void
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mpt_link_peer(mpt_softc_t *mpt)
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{
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mpt_softc_t *mpt2;
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if (mpt->unit == 0) {
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return;
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}
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/*
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* XXX: depends on probe order
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*/
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mpt2 = (mpt_softc_t *) devclass_get_softc(mpt_devclass, mpt->unit-1);
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if (mpt2 == NULL) {
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return;
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}
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if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
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return;
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}
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if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
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return;
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}
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mpt->mpt2 = mpt2;
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mpt2->mpt2 = mpt;
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if (mpt->verbose) {
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mpt_prt(mpt, "linking with peer (mpt%d)",
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device_get_unit(mpt2->dev));
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}
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}
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static int
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mpt_attach(device_t dev)
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{
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int iqd;
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u_int32_t data, cmd;
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mpt_softc_t *mpt;
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/* Allocate the softc structure */
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mpt = (mpt_softc_t*) device_get_softc(dev);
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if (mpt == NULL) {
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device_printf(dev, "cannot allocate softc\n");
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return (ENOMEM);
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}
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bzero(mpt, sizeof (mpt_softc_t));
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switch ((pci_get_device(dev) & ~1)) {
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case PCI_PRODUCT_LSI_FC909:
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case PCI_PRODUCT_LSI_FC909A:
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case PCI_PRODUCT_LSI_FC919:
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case PCI_PRODUCT_LSI_FC929:
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mpt->is_fc = 1;
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break;
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default:
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break;
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}
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mpt->dev = dev;
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mpt->unit = device_get_unit(dev);
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mpt_set_options(mpt);
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mpt->verbose += (bootverbose != 0)? 1 : 0;
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/* Make sure memory access decoders are enabled */
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cmd = pci_read_config(dev, PCIR_COMMAND, 2);
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if ((cmd & PCIM_CMD_MEMEN) == 0) {
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device_printf(dev, "Memory accesses disabled");
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goto bad;
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}
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/*
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* Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
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*/
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cmd |=
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PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
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PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
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pci_write_config(dev, PCIR_COMMAND, cmd, 2);
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/*
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* Make sure we've disabled the ROM.
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*/
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data = pci_read_config(dev, PCIR_BIOS, 4);
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data &= ~1;
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pci_write_config(dev, PCIR_BIOS, data, 4);
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/*
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* Is this part a dual?
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* If so, link with our partner (around yet)
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*/
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if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
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(pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
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mpt_link_peer(mpt);
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}
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/* Set up the memory regions */
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/* Allocate kernel virtual memory for the 9x9's Mem0 region */
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mpt->pci_reg_id = MEM_MAP_REG;
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mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
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&mpt->pci_reg_id, 0, ~0, 0, RF_ACTIVE);
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if (mpt->pci_reg == NULL) {
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device_printf(dev, "unable to map any ports\n");
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goto bad;
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}
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mpt->pci_st = rman_get_bustag(mpt->pci_reg);
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mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
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/* Get the Physical Address */
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mpt->pci_pa = rman_get_start(mpt->pci_reg);
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/* Get a handle to the interrupt */
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iqd = 0;
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mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0,
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1, RF_ACTIVE | RF_SHAREABLE);
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if (mpt->pci_irq == NULL) {
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device_printf(dev, "could not allocate interrupt\n");
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goto bad;
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}
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/* Register the interrupt handler */
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if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
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mpt, &mpt->ih)) {
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device_printf(dev, "could not setup interrupt\n");
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goto bad;
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}
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MPT_LOCK_SETUP(mpt);
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/* Disable interrupts at the part */
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mpt_disable_ints(mpt);
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/* Allocate dma memory */
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if (mpt_dma_mem_alloc(mpt)) {
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device_printf(dev, "Could not allocate DMA memory\n");
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goto bad;
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}
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/*
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* Save the PCI config register values
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*
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* Hard resets are known to screw up the BAR for diagnostic
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* memory accesses (Mem1).
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*
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* Using Mem1 is known to make the chip stop responding to
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* configuration space transfers, so we need to save it now
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*/
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mpt_read_config_regs(mpt);
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/* Initialize the hardware */
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if (mpt->disabled == 0) {
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MPT_LOCK(mpt);
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if (mpt_init(mpt, MPT_DB_INIT_HOST) != 0) {
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MPT_UNLOCK(mpt);
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goto bad;
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}
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/*
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* Attach to CAM
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*/
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MPTLOCK_2_CAMLOCK(mpt);
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mpt_cam_attach(mpt);
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CAMLOCK_2_MPTLOCK(mpt);
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MPT_UNLOCK(mpt);
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}
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return (0);
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bad:
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mpt_dma_mem_free(mpt);
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mpt_free_bus_resources(mpt);
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/*
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* but return zero to preserve unit numbering
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*/
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return (0);
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}
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/*
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* Free bus resources
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*/
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static void
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mpt_free_bus_resources(mpt_softc_t *mpt)
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{
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if (mpt->ih) {
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bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
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mpt->ih = 0;
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}
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if (mpt->pci_irq) {
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bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
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mpt->pci_irq = 0;
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}
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if (mpt->pci_reg) {
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bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_reg_id,
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mpt->pci_reg);
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mpt->pci_reg = 0;
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}
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MPT_LOCK_DESTROY(mpt);
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}
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/*
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* Disconnect ourselves from the system.
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*/
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static int
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mpt_detach(device_t dev)
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{
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mpt_softc_t *mpt;
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mpt = (mpt_softc_t*) device_get_softc(dev);
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mpt_prt(mpt, "mpt_detach");
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if (mpt) {
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mpt_disable_ints(mpt);
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mpt_cam_detach(mpt);
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mpt_reset(mpt);
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mpt_dma_mem_free(mpt);
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mpt_free_bus_resources(mpt);
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}
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return(0);
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}
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/*
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* Disable the hardware
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*/
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static int
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mpt_shutdown(device_t dev)
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{
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mpt_softc_t *mpt;
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mpt = (mpt_softc_t*) device_get_softc(dev);
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if (mpt) {
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mpt_reset(mpt);
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}
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return(0);
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}
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struct imush {
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mpt_softc_t *mpt;
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int error;
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u_int32_t phys;
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};
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static void
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mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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{
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struct imush *imushp = (struct imush *) arg;
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imushp->error = error;
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imushp->phys = segs->ds_addr;
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}
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static int
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mpt_dma_mem_alloc(mpt_softc_t *mpt)
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{
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int i, error;
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u_char *vptr;
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u_int32_t pptr, end;
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size_t len;
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struct imush im;
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device_t dev = mpt->dev;
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/* Check if we alreay have allocated the reply memory */
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if (mpt->reply_phys != NULL) {
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return 0;
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}
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len = sizeof (request_t *) * MPT_REQ_MEM_SIZE(mpt);
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#ifdef RELENG_4
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mpt->request_pool = (request_t *) malloc(len, M_DEVBUF, M_WAITOK);
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if (mpt->request_pool == NULL) {
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device_printf(dev, "cannot allocate request pool\n");
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return (1);
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}
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bzero(mpt->request_pool, len);
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#else
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mpt->request_pool = (request_t *)
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malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
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if (mpt->request_pool == NULL) {
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device_printf(dev, "cannot allocate request pool\n");
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return (1);
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}
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#endif
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/*
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* Create a dma tag for this device
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*
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* Align at page boundaries, limit to 32-bit addressing
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* (The chip supports 64-bit addressing, but this driver doesn't)
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*/
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if (bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT,
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BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT,
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BUS_SPACE_MAXSIZE_32BIT, BUS_SPACE_UNRESTRICTED, 0,
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busdma_lock_mutex, &Giant, &mpt->parent_dmat) != 0) {
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device_printf(dev, "cannot create parent dma tag\n");
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return (1);
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}
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/* Create a child tag for reply buffers */
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if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
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0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
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NULL, NULL, PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
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busdma_lock_mutex, &Giant, &mpt->reply_dmat) != 0) {
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device_printf(dev, "cannot create a dma tag for replies\n");
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return (1);
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}
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/* Allocate some DMA accessable memory for replies */
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if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
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BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
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device_printf(dev, "cannot allocate %lu bytes of reply memory\n",
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(u_long)PAGE_SIZE);
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return (1);
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}
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|
im.mpt = mpt;
|
|
im.error = 0;
|
|
|
|
/* Load and lock it into "bus space" */
|
|
bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
|
|
PAGE_SIZE, mpt_map_rquest, &im, 0);
|
|
|
|
if (im.error) {
|
|
device_printf(dev,
|
|
"error %d loading dma map for DMA reply queue\n", im.error);
|
|
return (1);
|
|
}
|
|
mpt->reply_phys = im.phys;
|
|
|
|
/* Create a child tag for data buffers */
|
|
if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
|
|
0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
|
|
NULL, NULL, MAXBSIZE, MPT_SGL_MAX, BUS_SPACE_MAXSIZE_32BIT, 0,
|
|
busdma_lock_mutex, &Giant, &mpt->buffer_dmat) != 0) {
|
|
device_printf(dev,
|
|
"cannot create a dma tag for data buffers\n");
|
|
return (1);
|
|
}
|
|
|
|
/* Create a child tag for request buffers */
|
|
if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
|
|
0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
|
|
NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
|
|
busdma_lock_mutex, &Giant, &mpt->request_dmat) != 0) {
|
|
device_printf(dev, "cannot create a dma tag for requests\n");
|
|
return (1);
|
|
}
|
|
|
|
/* Allocate some DMA accessable memory for requests */
|
|
if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
|
|
BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
|
|
device_printf(dev,
|
|
"cannot allocate %d bytes of request memory\n",
|
|
MPT_REQ_MEM_SIZE(mpt));
|
|
return (1);
|
|
}
|
|
|
|
im.mpt = mpt;
|
|
im.error = 0;
|
|
|
|
/* Load and lock it into "bus space" */
|
|
bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
|
|
MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &im, 0);
|
|
|
|
if (im.error) {
|
|
device_printf(dev,
|
|
"error %d loading dma map for DMA request queue\n",
|
|
im.error);
|
|
return (1);
|
|
}
|
|
mpt->request_phys = im.phys;
|
|
|
|
i = 0;
|
|
pptr = mpt->request_phys;
|
|
vptr = mpt->request;
|
|
end = pptr + MPT_REQ_MEM_SIZE(mpt);
|
|
while(pptr < end) {
|
|
request_t *req = &mpt->request_pool[i];
|
|
req->index = i++;
|
|
|
|
/* Store location of Request Data */
|
|
req->req_pbuf = pptr;
|
|
req->req_vbuf = vptr;
|
|
|
|
pptr += MPT_REQUEST_AREA;
|
|
vptr += MPT_REQUEST_AREA;
|
|
|
|
req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
|
|
req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
|
|
|
|
error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
|
|
if (error) {
|
|
device_printf(dev,
|
|
"error %d creating per-cmd DMA maps\n", error);
|
|
return (1);
|
|
}
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
|
|
|
|
/* Deallocate memory that was allocated by mpt_dma_mem_alloc
|
|
*/
|
|
static void
|
|
mpt_dma_mem_free(mpt_softc_t *mpt)
|
|
{
|
|
int i;
|
|
|
|
/* Make sure we aren't double destroying */
|
|
if (mpt->reply_dmat == 0) {
|
|
if (mpt->verbose)
|
|
device_printf(mpt->dev,"Already released dma memory\n");
|
|
return;
|
|
}
|
|
|
|
for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
|
|
bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
|
|
}
|
|
bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
|
|
bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
|
|
bus_dma_tag_destroy(mpt->request_dmat);
|
|
bus_dma_tag_destroy(mpt->buffer_dmat);
|
|
bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
|
|
bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
|
|
bus_dma_tag_destroy(mpt->reply_dmat);
|
|
bus_dma_tag_destroy(mpt->parent_dmat);
|
|
mpt->reply_dmat = 0;
|
|
free(mpt->request_pool, M_DEVBUF);
|
|
mpt->request_pool = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Reads modifiable (via PCI transactions) config registers */
|
|
static void
|
|
mpt_read_config_regs(mpt_softc_t *mpt)
|
|
{
|
|
mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
|
|
mpt->pci_cfg.LatencyTimer_LineSize =
|
|
pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
|
|
mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_MAPS, 4);
|
|
mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0x4, 4);
|
|
mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x8, 4);
|
|
mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0xC, 4);
|
|
mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x10, 4);
|
|
mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
|
|
mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
|
|
mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
|
|
}
|
|
|
|
/* Sets modifiable config registers */
|
|
void
|
|
mpt_set_config_regs(mpt_softc_t *mpt)
|
|
{
|
|
u_int32_t val;
|
|
|
|
#define MPT_CHECK(reg, offset, size) \
|
|
val = pci_read_config(mpt->dev, offset, size); \
|
|
if (mpt->pci_cfg.reg != val) { \
|
|
mpt_prt(mpt, \
|
|
"Restoring " #reg " to 0x%X from 0x%X\n", \
|
|
mpt->pci_cfg.reg, val); \
|
|
}
|
|
|
|
if (mpt->verbose) {
|
|
MPT_CHECK(Command, PCIR_COMMAND, 2);
|
|
MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
|
|
MPT_CHECK(IO_BAR, PCIR_MAPS, 4);
|
|
MPT_CHECK(Mem0_BAR[0], PCIR_MAPS+0x4, 4);
|
|
MPT_CHECK(Mem0_BAR[1], PCIR_MAPS+0x8, 4);
|
|
MPT_CHECK(Mem1_BAR[0], PCIR_MAPS+0xC, 4);
|
|
MPT_CHECK(Mem1_BAR[1], PCIR_MAPS+0x10, 4);
|
|
MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
|
|
MPT_CHECK(IntLine, PCIR_INTLINE, 1);
|
|
MPT_CHECK(PMCSR, 0x44, 4);
|
|
}
|
|
#undef MPT_CHECK
|
|
|
|
pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
|
|
pci_write_config(mpt->dev, PCIR_CACHELNSZ,
|
|
mpt->pci_cfg.LatencyTimer_LineSize, 2);
|
|
pci_write_config(mpt->dev, PCIR_MAPS, mpt->pci_cfg.IO_BAR, 4);
|
|
pci_write_config(mpt->dev, PCIR_MAPS+0x4, mpt->pci_cfg.Mem0_BAR[0], 4);
|
|
pci_write_config(mpt->dev, PCIR_MAPS+0x8, mpt->pci_cfg.Mem0_BAR[1], 4);
|
|
pci_write_config(mpt->dev, PCIR_MAPS+0xC, mpt->pci_cfg.Mem1_BAR[0], 4);
|
|
pci_write_config(mpt->dev, PCIR_MAPS+0x10, mpt->pci_cfg.Mem1_BAR[1], 4);
|
|
pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
|
|
pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
|
|
pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
|
|
}
|
|
|
|
static void
|
|
mpt_pci_intr(void *arg)
|
|
{
|
|
mpt_softc_t *mpt = arg;
|
|
MPT_LOCK(mpt);
|
|
(void) mpt_intr(mpt);
|
|
MPT_UNLOCK(mpt);
|
|
}
|