6e6e271c34
I/O windows, the default is to preserve the firmware-assigned resources. PCI bus numbers are only managed if NEW_PCIB is enabled and the architecture defines a PCI_RES_BUS resource type. - Add a helper API to create top-level PCI bus resource managers for each PCI domain/segment. Host-PCI bridge drivers use this API to allocate bus numbers from their associated domain. - Change the PCI bus and CardBus drivers to allocate a bus resource for their bus number from the parent PCI bridge device. - Change the PCI-PCI and PCI-CardBus bridge drivers to allocate the full range of bus numbers from secbus to subbus from their parent bridge. The drivers also always program their primary bus register. The bridge drivers also support growing their bus range by extending the bus resource and updating subbus to match the larger range. - Add support for managing PCI bus resources to the Host-PCI bridge drivers used for amd64 and i386 (acpi_pcib, mptable_pcib, legacy_pcib, and qpi_pcib). - Define a PCI_RES_BUS resource type for amd64 and i386. Reviewed by: imp MFC after: 1 month
656 lines
19 KiB
C
656 lines
19 KiB
C
/*-
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* Copyright (c) 2000 Michael Smith
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* Copyright (c) 2000 BSDi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_acpi.h"
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/limits.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <contrib/dev/acpica/include/acpi.h>
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#include <contrib/dev/acpica/include/accommon.h>
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#include <dev/acpica/acpivar.h>
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#include <machine/pci_cfgreg.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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#include "pcib_if.h"
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#include <dev/acpica/acpi_pcibvar.h>
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/* Hooks for the ACPI CA debugging infrastructure. */
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#define _COMPONENT ACPI_BUS
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ACPI_MODULE_NAME("PCI_ACPI")
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struct acpi_hpcib_softc {
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device_t ap_dev;
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ACPI_HANDLE ap_handle;
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int ap_flags;
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int ap_segment; /* PCI domain */
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int ap_bus; /* bios-assigned bus number */
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int ap_addr; /* device/func of PCI-Host bridge */
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ACPI_BUFFER ap_prt; /* interrupt routing table */
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#ifdef NEW_PCIB
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struct pcib_host_resources ap_host_res;
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#endif
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};
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static int acpi_pcib_acpi_probe(device_t bus);
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static int acpi_pcib_acpi_attach(device_t bus);
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static int acpi_pcib_read_ivar(device_t dev, device_t child,
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int which, uintptr_t *result);
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static int acpi_pcib_write_ivar(device_t dev, device_t child,
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int which, uintptr_t value);
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static uint32_t acpi_pcib_read_config(device_t dev, u_int bus,
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u_int slot, u_int func, u_int reg, int bytes);
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static void acpi_pcib_write_config(device_t dev, u_int bus,
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u_int slot, u_int func, u_int reg, uint32_t data,
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int bytes);
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static int acpi_pcib_acpi_route_interrupt(device_t pcib,
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device_t dev, int pin);
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static int acpi_pcib_alloc_msi(device_t pcib, device_t dev,
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int count, int maxcount, int *irqs);
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static int acpi_pcib_map_msi(device_t pcib, device_t dev,
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int irq, uint64_t *addr, uint32_t *data);
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static int acpi_pcib_alloc_msix(device_t pcib, device_t dev,
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int *irq);
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static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev,
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device_t child, int type, int *rid,
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u_long start, u_long end, u_long count,
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u_int flags);
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#ifdef NEW_PCIB
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static int acpi_pcib_acpi_adjust_resource(device_t dev,
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device_t child, int type, struct resource *r,
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u_long start, u_long end);
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#ifdef PCI_RES_BUS
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static int acpi_pcib_acpi_release_resource(device_t dev,
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device_t child, int type, int rid,
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struct resource *r);
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#endif
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#endif
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static device_method_t acpi_pcib_acpi_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, acpi_pcib_acpi_probe),
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DEVMETHOD(device_attach, acpi_pcib_acpi_attach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* Bus interface */
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DEVMETHOD(bus_read_ivar, acpi_pcib_read_ivar),
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DEVMETHOD(bus_write_ivar, acpi_pcib_write_ivar),
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DEVMETHOD(bus_alloc_resource, acpi_pcib_acpi_alloc_resource),
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#ifdef NEW_PCIB
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DEVMETHOD(bus_adjust_resource, acpi_pcib_acpi_adjust_resource),
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#else
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DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
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#endif
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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DEVMETHOD(bus_release_resource, acpi_pcib_acpi_release_resource),
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#else
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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#endif
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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/* pcib interface */
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DEVMETHOD(pcib_maxslots, pcib_maxslots),
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DEVMETHOD(pcib_read_config, acpi_pcib_read_config),
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DEVMETHOD(pcib_write_config, acpi_pcib_write_config),
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DEVMETHOD(pcib_route_interrupt, acpi_pcib_acpi_route_interrupt),
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DEVMETHOD(pcib_alloc_msi, acpi_pcib_alloc_msi),
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DEVMETHOD(pcib_release_msi, pcib_release_msi),
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DEVMETHOD(pcib_alloc_msix, acpi_pcib_alloc_msix),
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DEVMETHOD(pcib_release_msix, pcib_release_msix),
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DEVMETHOD(pcib_map_msi, acpi_pcib_map_msi),
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DEVMETHOD(pcib_power_for_sleep, acpi_pcib_power_for_sleep),
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DEVMETHOD_END
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};
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static devclass_t pcib_devclass;
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DEFINE_CLASS_0(pcib, acpi_pcib_acpi_driver, acpi_pcib_acpi_methods,
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sizeof(struct acpi_hpcib_softc));
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DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, pcib_devclass, 0, 0);
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MODULE_DEPEND(acpi_pcib, acpi, 1, 1, 1);
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static int
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acpi_pcib_acpi_probe(device_t dev)
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{
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ACPI_DEVICE_INFO *devinfo;
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ACPI_HANDLE h;
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int root;
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if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL ||
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ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo)))
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return (ENXIO);
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root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;
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AcpiOsFree(devinfo);
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if (!root || pci_cfgregopen() == 0)
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return (ENXIO);
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device_set_desc(dev, "ACPI Host-PCI bridge");
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return (0);
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}
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#ifdef NEW_PCIB
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static ACPI_STATUS
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acpi_pcib_producer_handler(ACPI_RESOURCE *res, void *context)
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{
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struct acpi_hpcib_softc *sc;
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UINT64 length, min, max;
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u_int flags;
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int error, type;
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sc = context;
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switch (res->Type) {
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case ACPI_RESOURCE_TYPE_START_DEPENDENT:
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case ACPI_RESOURCE_TYPE_END_DEPENDENT:
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panic("host bridge has depenedent resources");
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case ACPI_RESOURCE_TYPE_ADDRESS16:
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case ACPI_RESOURCE_TYPE_ADDRESS32:
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case ACPI_RESOURCE_TYPE_ADDRESS64:
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case ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64:
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if (res->Data.Address.ProducerConsumer != ACPI_PRODUCER)
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break;
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switch (res->Type) {
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case ACPI_RESOURCE_TYPE_ADDRESS16:
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min = res->Data.Address16.Minimum;
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max = res->Data.Address16.Maximum;
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length = res->Data.Address16.AddressLength;
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break;
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case ACPI_RESOURCE_TYPE_ADDRESS32:
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min = res->Data.Address32.Minimum;
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max = res->Data.Address32.Maximum;
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length = res->Data.Address32.AddressLength;
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break;
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case ACPI_RESOURCE_TYPE_ADDRESS64:
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min = res->Data.Address64.Minimum;
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max = res->Data.Address64.Maximum;
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length = res->Data.Address64.AddressLength;
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break;
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default:
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KASSERT(res->Type ==
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ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64,
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("should never happen"));
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min = res->Data.ExtAddress64.Minimum;
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max = res->Data.ExtAddress64.Maximum;
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length = res->Data.ExtAddress64.AddressLength;
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break;
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}
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if (length == 0)
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break;
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if (min + length - 1 != max &&
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(res->Data.Address.MinAddressFixed != ACPI_ADDRESS_FIXED ||
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res->Data.Address.MaxAddressFixed != ACPI_ADDRESS_FIXED))
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break;
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flags = 0;
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switch (res->Data.Address.ResourceType) {
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case ACPI_MEMORY_RANGE:
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type = SYS_RES_MEMORY;
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if (res->Type != ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64) {
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if (res->Data.Address.Info.Mem.Caching ==
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ACPI_PREFETCHABLE_MEMORY)
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flags |= RF_PREFETCHABLE;
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} else {
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/*
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* XXX: Parse prefetch flag out of
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* TypeSpecific.
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*/
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}
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break;
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case ACPI_IO_RANGE:
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type = SYS_RES_IOPORT;
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break;
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#ifdef PCI_RES_BUS
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case ACPI_BUS_NUMBER_RANGE:
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type = PCI_RES_BUS;
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break;
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#endif
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default:
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return (AE_OK);
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}
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if (min + length - 1 != max)
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device_printf(sc->ap_dev,
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"Length mismatch for %d range: %jx vs %jx\n", type,
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(uintmax_t)(max - min + 1), (uintmax_t)length);
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#ifdef __i386__
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if (min > ULONG_MAX) {
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device_printf(sc->ap_dev,
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"Ignoring %d range above 4GB (%#jx-%#jx)\n",
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type, (uintmax_t)min, (uintmax_t)max);
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break;
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}
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if (max > ULONG_MAX) {
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device_printf(sc->ap_dev,
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"Truncating end of %d range above 4GB (%#jx-%#jx)\n",
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type, (uintmax_t)min, (uintmax_t)max);
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max = ULONG_MAX;
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}
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#endif
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error = pcib_host_res_decodes(&sc->ap_host_res, type, min, max,
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flags);
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if (error)
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panic("Failed to manage %d range (%#jx-%#jx): %d",
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type, (uintmax_t)min, (uintmax_t)max, error);
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break;
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default:
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break;
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}
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return (AE_OK);
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}
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#endif
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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static int
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first_decoded_bus(struct acpi_hpcib_softc *sc, u_long *startp)
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{
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struct resource_list_entry *rle;
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rle = resource_list_find(&sc->ap_host_res.hr_rl, PCI_RES_BUS, 0);
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if (rle == NULL)
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return (ENXIO);
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*startp = rle->start;
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return (0);
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}
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#endif
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static int
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acpi_pcib_acpi_attach(device_t dev)
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{
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struct acpi_hpcib_softc *sc;
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ACPI_STATUS status;
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static int bus0_seen = 0;
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u_int slot, func, busok;
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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struct resource *bus_res;
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u_long start;
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int rid;
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#endif
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uint8_t busno;
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ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
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sc = device_get_softc(dev);
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sc->ap_dev = dev;
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sc->ap_handle = acpi_get_handle(dev);
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/*
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* Don't attach if we're not really there.
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*/
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if (!acpi_DeviceIsPresent(dev))
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return (ENXIO);
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/*
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* Get our segment number by evaluating _SEG.
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* It's OK for this to not exist.
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*/
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status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment);
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if (ACPI_FAILURE(status)) {
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if (status != AE_NOT_FOUND) {
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device_printf(dev, "could not evaluate _SEG - %s\n",
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AcpiFormatException(status));
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return_VALUE (ENXIO);
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}
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/* If it's not found, assume 0. */
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sc->ap_segment = 0;
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}
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/*
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* Get the address (device and function) of the associated
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* PCI-Host bridge device from _ADR. Assume we don't have one if
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* it doesn't exist.
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*/
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status = acpi_GetInteger(sc->ap_handle, "_ADR", &sc->ap_addr);
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if (ACPI_FAILURE(status)) {
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device_printf(dev, "could not evaluate _ADR - %s\n",
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AcpiFormatException(status));
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sc->ap_addr = -1;
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}
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#ifdef NEW_PCIB
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/*
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* Determine which address ranges this bridge decodes and setup
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* resource managers for those ranges.
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*/
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if (pcib_host_res_init(sc->ap_dev, &sc->ap_host_res) != 0)
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panic("failed to init hostb resources");
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if (!acpi_disabled("hostres")) {
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status = AcpiWalkResources(sc->ap_handle, "_CRS",
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acpi_pcib_producer_handler, sc);
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if (ACPI_FAILURE(status) && status != AE_NOT_FOUND)
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device_printf(sc->ap_dev, "failed to parse resources: %s\n",
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AcpiFormatException(status));
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}
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#endif
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/*
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* Get our base bus number by evaluating _BBN.
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* If this doesn't work, we assume we're bus number 0.
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*
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* XXX note that it may also not exist in the case where we are
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* meant to use a private configuration space mechanism for this bus,
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* so we should dig out our resources and check to see if we have
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* anything like that. How do we do this?
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* XXX If we have the requisite information, and if we don't think the
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* default PCI configuration space handlers can deal with this bus,
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* we should attach our own handler.
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* XXX invoke _REG on this for the PCI config space address space?
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* XXX It seems many BIOS's with multiple Host-PCI bridges do not set
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* _BBN correctly. They set _BBN to zero for all bridges. Thus,
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* if _BBN is zero and PCI bus 0 already exists, we try to read our
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* bus number from the configuration registers at address _ADR.
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* We only do this for domain/segment 0 in the hopes that this is
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* only needed for old single-domain machines.
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*/
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status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus);
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if (ACPI_FAILURE(status)) {
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if (status != AE_NOT_FOUND) {
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device_printf(dev, "could not evaluate _BBN - %s\n",
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AcpiFormatException(status));
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return (ENXIO);
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} else {
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/* If it's not found, assume 0. */
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sc->ap_bus = 0;
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}
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}
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/*
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* If this is segment 0, the bus is zero, and PCI bus 0 already
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* exists, read the bus number via PCI config space.
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*/
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busok = 1;
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if (sc->ap_segment == 0 && sc->ap_bus == 0 && bus0_seen) {
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busok = 0;
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if (sc->ap_addr != -1) {
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/* XXX: We assume bus 0. */
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slot = ACPI_ADR_PCI_SLOT(sc->ap_addr);
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func = ACPI_ADR_PCI_FUNC(sc->ap_addr);
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if (bootverbose)
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device_printf(dev, "reading config registers from 0:%d:%d\n",
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slot, func);
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if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0)
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device_printf(dev, "couldn't read bus number from cfg space\n");
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else {
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sc->ap_bus = busno;
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busok = 1;
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}
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}
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}
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#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
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/*
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* If nothing else worked, hope that ACPI at least lays out the
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* Host-PCI bridges in order and that as a result the next free
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* bus number is our bus number.
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*/
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if (busok == 0) {
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/*
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* If we have a region of bus numbers, use the first
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* number for our bus.
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*/
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if (first_decoded_bus(sc, &start) == 0)
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sc->ap_bus = start;
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else {
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rid = 0;
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bus_res = pci_domain_alloc_bus(sc->ap_segment, dev, &rid, 0,
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PCI_BUSMAX, 1, 0);
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if (bus_res == NULL) {
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device_printf(dev,
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"could not allocate bus number\n");
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pcib_host_res_free(dev, &sc->ap_host_res);
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return (ENXIO);
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}
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sc->ap_bus = rman_get_start(bus_res);
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pci_domain_release_bus(sc->ap_segment, dev, rid, bus_res);
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}
|
|
} else {
|
|
#ifdef INVARIANTS
|
|
if (first_decoded_bus(sc, &start) == 0)
|
|
KASSERT(start == sc->ap_bus, ("bus number mismatch"));
|
|
#endif
|
|
}
|
|
#else
|
|
/*
|
|
* If nothing else worked, hope that ACPI at least lays out the
|
|
* host-PCI bridges in order and that as a result our unit number
|
|
* is actually our bus number. There are several reasons this
|
|
* might not be true.
|
|
*/
|
|
if (busok == 0) {
|
|
sc->ap_bus = device_get_unit(dev);
|
|
device_printf(dev, "trying bus number %d\n", sc->ap_bus);
|
|
}
|
|
#endif
|
|
|
|
/* If this is bus 0 on segment 0, note that it has been seen already. */
|
|
if (sc->ap_segment == 0 && sc->ap_bus == 0)
|
|
bus0_seen = 1;
|
|
|
|
return (acpi_pcib_attach(dev, &sc->ap_prt, sc->ap_bus));
|
|
}
|
|
|
|
/*
|
|
* Support for standard PCI bridge ivars.
|
|
*/
|
|
static int
|
|
acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
|
|
{
|
|
struct acpi_hpcib_softc *sc = device_get_softc(dev);
|
|
|
|
switch (which) {
|
|
case PCIB_IVAR_DOMAIN:
|
|
*result = sc->ap_segment;
|
|
return (0);
|
|
case PCIB_IVAR_BUS:
|
|
*result = sc->ap_bus;
|
|
return (0);
|
|
case ACPI_IVAR_HANDLE:
|
|
*result = (uintptr_t)sc->ap_handle;
|
|
return (0);
|
|
case ACPI_IVAR_FLAGS:
|
|
*result = (uintptr_t)sc->ap_flags;
|
|
return (0);
|
|
}
|
|
return (ENOENT);
|
|
}
|
|
|
|
static int
|
|
acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
|
|
{
|
|
struct acpi_hpcib_softc *sc = device_get_softc(dev);
|
|
|
|
switch (which) {
|
|
case PCIB_IVAR_DOMAIN:
|
|
return (EINVAL);
|
|
case PCIB_IVAR_BUS:
|
|
sc->ap_bus = value;
|
|
return (0);
|
|
case ACPI_IVAR_HANDLE:
|
|
sc->ap_handle = (ACPI_HANDLE)value;
|
|
return (0);
|
|
case ACPI_IVAR_FLAGS:
|
|
sc->ap_flags = (int)value;
|
|
return (0);
|
|
}
|
|
return (ENOENT);
|
|
}
|
|
|
|
static uint32_t
|
|
acpi_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
|
|
u_int reg, int bytes)
|
|
{
|
|
return (pci_cfgregread(bus, slot, func, reg, bytes));
|
|
}
|
|
|
|
static void
|
|
acpi_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
|
|
u_int reg, uint32_t data, int bytes)
|
|
{
|
|
pci_cfgregwrite(bus, slot, func, reg, data, bytes);
|
|
}
|
|
|
|
static int
|
|
acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin)
|
|
{
|
|
struct acpi_hpcib_softc *sc = device_get_softc(pcib);
|
|
|
|
return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt));
|
|
}
|
|
|
|
static int
|
|
acpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
|
|
int *irqs)
|
|
{
|
|
device_t bus;
|
|
|
|
bus = device_get_parent(pcib);
|
|
return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
|
|
irqs));
|
|
}
|
|
|
|
static int
|
|
acpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
|
|
{
|
|
device_t bus;
|
|
|
|
bus = device_get_parent(pcib);
|
|
return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
|
|
}
|
|
|
|
static int
|
|
acpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
|
|
uint32_t *data)
|
|
{
|
|
struct acpi_hpcib_softc *sc;
|
|
device_t bus, hostb;
|
|
int error;
|
|
|
|
bus = device_get_parent(pcib);
|
|
error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
|
|
if (error)
|
|
return (error);
|
|
|
|
sc = device_get_softc(pcib);
|
|
if (sc->ap_addr == -1)
|
|
return (0);
|
|
/* XXX: Assumes all bridges are on bus 0. */
|
|
hostb = pci_find_dbsf(sc->ap_segment, 0, ACPI_ADR_PCI_SLOT(sc->ap_addr),
|
|
ACPI_ADR_PCI_FUNC(sc->ap_addr));
|
|
if (hostb != NULL)
|
|
pci_ht_map_msi(hostb, *addr);
|
|
return (0);
|
|
}
|
|
|
|
struct resource *
|
|
acpi_pcib_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
|
u_long start, u_long end, u_long count, u_int flags)
|
|
{
|
|
#ifdef NEW_PCIB
|
|
struct acpi_hpcib_softc *sc;
|
|
struct resource *res;
|
|
#endif
|
|
|
|
#if defined(__i386__) || defined(__amd64__)
|
|
start = hostb_alloc_start(type, start, end, count);
|
|
#endif
|
|
|
|
#ifdef NEW_PCIB
|
|
sc = device_get_softc(dev);
|
|
#ifdef PCI_RES_BUS
|
|
if (type == PCI_RES_BUS)
|
|
return (pci_domain_alloc_bus(sc->ap_segment, child, rid, start, end,
|
|
count, flags));
|
|
#endif
|
|
res = pcib_host_res_alloc(&sc->ap_host_res, child, type, rid, start, end,
|
|
count, flags);
|
|
|
|
/*
|
|
* XXX: If this is a request for a specific range, assume it is
|
|
* correct and pass it up to the parent. What we probably want to
|
|
* do long-term is explicitly trust any firmware-configured
|
|
* resources during the initial bus scan on boot and then disable
|
|
* this after that.
|
|
*/
|
|
if (res == NULL && start + count - 1 == end)
|
|
res = bus_generic_alloc_resource(dev, child, type, rid, start, end,
|
|
count, flags);
|
|
return (res);
|
|
#else
|
|
return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
|
|
count, flags));
|
|
#endif
|
|
}
|
|
|
|
#ifdef NEW_PCIB
|
|
int
|
|
acpi_pcib_acpi_adjust_resource(device_t dev, device_t child, int type,
|
|
struct resource *r, u_long start, u_long end)
|
|
{
|
|
struct acpi_hpcib_softc *sc;
|
|
|
|
sc = device_get_softc(dev);
|
|
#ifdef PCI_RES_BUS
|
|
if (type == PCI_RES_BUS)
|
|
return (pci_domain_adjust_bus(sc->ap_segment, child, r, start,
|
|
end));
|
|
#endif
|
|
return (pcib_host_res_adjust(&sc->ap_host_res, child, type, r, start,
|
|
end));
|
|
}
|
|
|
|
#ifdef PCI_RES_BUS
|
|
int
|
|
acpi_pcib_acpi_release_resource(device_t dev, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
struct acpi_hpcib_softc *sc;
|
|
|
|
sc = device_get_softc(dev);
|
|
if (type == PCI_RES_BUS)
|
|
return (pci_domain_release_bus(sc->ap_segment, child, rid, r));
|
|
return (bus_generic_release_resource(dev, child, type, rid, r));
|
|
}
|
|
#endif
|
|
#endif
|