tegge 9f3982f0f6 When entering the apic version of slow interrupt handler, level
interrupts are masked, and EOI is sent iff the corresponding ISR bit
is set in the local apic. If the CPU cannot obtain the interrupt
service lock (currently the global kernel lock) the interrupt is
forwarded to the CPU holding that lock.

Clock interrupts now have higher priority than other slow interrupts.
1998-03-03 22:56:30 +00:00
..
1998-02-09 06:11:36 +00:00
1998-02-09 06:11:36 +00:00
1998-02-20 13:11:54 +00:00
1998-02-20 13:37:40 +00:00