1b4e85be4d
- Report valid residual byte counts. We actually pause the sequencer when the residual is non-zero. I thought about using DMA to do this, bus sequencer program space is tight. - Fix embarassing off by one error in the computation of a 2's compliment variable. This was most likely the cause of the many problems reported with the tagged queuing code. - Handle "MAX_SYNC" as a special case (ie we are the ones starting the sync negotiation sequence). This was done so that the target scratch area can be initialed to 0 offset (asyncronous transfers) safely. The initialization to 0 (was 15) is necessary since in some cases a Wide negotiation could run into problems if SCSIRATE was set wrong and we went into data(in/out). - Trim the DMA routines a little by using some procedures. Net effect is more functionality with 3 less instructions after this update. - Toggle the WIDEODD bit of the DFCNTRL whenever this is not the last SG block. It has no effect in the 8bit bus configuration, but in the Wide configuration ensures that the overlap byte is held in the SCSI block if the transfer is odd so it will end up in the next SG (the correct behavior). |
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| .. | ||
| aicasm | ||
| aic7xxx_asm.1 | ||
| aic7xxx_asm.c | ||
| aic7xxx.seq | ||
| aicasm.c | ||