769e0f974d
include: * Mutual exclusion is used instead of spl*(). See mutex(9). (Note: The alpha port is still in transition and currently uses both.) * Per-CPU idle processes. * Interrupts are run in their own separate kernel threads and can be preempted (i386 only). Partially contributed by: BSDi (BSD/OS) Submissions by (at least): cp, dfr, dillon, grog, jake, jhb, sheldonh
439 lines
9.9 KiB
ArmAsm
439 lines
9.9 KiB
ArmAsm
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "npx.h"
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#include "opt_user_ldt.h"
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#include <sys/rtprio.h>
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#include <machine/asmacros.h>
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#include <machine/ipl.h>
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#ifdef SMP
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#include <machine/pmap.h>
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#include <machine/apic.h>
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#include <machine/smptests.h> /** GRAB_LOPRIO */
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#include <machine/lock.h>
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#endif /* SMP */
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#include "assym.s"
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/*****************************************************************************/
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/* Scheduling */
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/*****************************************************************************/
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.data
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.globl _hlt_vector
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_hlt_vector: .long _default_halt /* pointer to halt routine */
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.globl _panic
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#if defined(SWTCH_OPTIM_STATS)
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.globl _swtch_optim_stats, _tlb_flush_count
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_swtch_optim_stats: .long 0 /* number of _swtch_optims */
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_tlb_flush_count: .long 0
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#endif
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.text
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ENTRY(default_halt)
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sti
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#ifndef SMP
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hlt /* XXX: until a wakeup IPI */
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#endif
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ret
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/*
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* cpu_throw()
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*/
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ENTRY(cpu_throw)
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jmp sw1
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/*
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* cpu_switch()
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*/
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ENTRY(cpu_switch)
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/* switch to new process. first, save context as needed */
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movl _curproc,%ecx
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movl %ecx,_prevproc
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/* if no process to save, don't bother */
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testl %ecx,%ecx
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jz sw1
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#ifdef SMP
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movb P_ONCPU(%ecx), %al /* save "last" cpu */
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movb %al, P_LASTCPU(%ecx)
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movb $0xff, P_ONCPU(%ecx) /* "leave" the cpu */
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#endif /* SMP */
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movl P_VMSPACE(%ecx), %edx
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#ifdef SMP
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movl _cpuid, %eax
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#else
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xorl %eax, %eax
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#endif /* SMP */
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btrl %eax, VM_PMAP+PM_ACTIVE(%edx)
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movl P_ADDR(%ecx),%edx
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movl (%esp),%eax /* Hardware registers */
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movl %eax,PCB_EIP(%edx)
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movl %ebx,PCB_EBX(%edx)
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movl %esp,PCB_ESP(%edx)
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movl %ebp,PCB_EBP(%edx)
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movl %esi,PCB_ESI(%edx)
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movl %edi,PCB_EDI(%edx)
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movl %gs,PCB_GS(%edx)
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/* test if debug registers should be saved */
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movb PCB_FLAGS(%edx),%al
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andb $PCB_DBREGS,%al
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jz 1f /* no, skip over */
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movl %dr7,%eax /* yes, do the save */
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movl %eax,PCB_DR7(%edx)
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andl $0x0000ff00, %eax /* disable all watchpoints */
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movl %eax,%dr7
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movl %dr6,%eax
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movl %eax,PCB_DR6(%edx)
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movl %dr3,%eax
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movl %eax,PCB_DR3(%edx)
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movl %dr2,%eax
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movl %eax,PCB_DR2(%edx)
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movl %dr1,%eax
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movl %eax,PCB_DR1(%edx)
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movl %dr0,%eax
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movl %eax,PCB_DR0(%edx)
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1:
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/* save sched_lock recursion count */
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movl _sched_lock+MTX_RECURSE,%eax
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movl %eax,PCB_SCHEDNEST(%edx)
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#ifdef SMP
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/* XXX FIXME: we should be saving the local APIC TPR */
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#endif /* SMP */
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#if NNPX > 0
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/* have we used fp, and need a save? */
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cmpl %ecx,_npxproc
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jne 1f
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addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
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pushl %edx
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call _npxsave /* do it in a big C function */
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popl %eax
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1:
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#endif /* NNPX > 0 */
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/* save is done, now choose a new process */
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sw1:
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#ifdef SMP
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/* Stop scheduling if smp_active goes zero and we are not BSP */
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cmpl $0,_smp_active
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jne 1f
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cmpl $0,_cpuid
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je 1f
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movl _idleproc, %eax
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jmp sw1b
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1:
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#endif
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/*
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* Choose a new process to schedule. chooseproc() returns idleproc
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* if it cannot find another process to run.
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*/
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sw1a:
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call _chooseproc /* trash ecx, edx, ret eax*/
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#ifdef DIAGNOSTIC
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testl %eax,%eax /* no process? */
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jz badsw3 /* no, panic */
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#endif
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sw1b:
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movl %eax,%ecx
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xorl %eax,%eax
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andl $~AST_RESCHED,_astpending
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#ifdef DIAGNOSTIC
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cmpl %eax,P_WCHAN(%ecx)
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jne badsw1
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cmpb $SRUN,P_STAT(%ecx)
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jne badsw2
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#endif
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movl P_ADDR(%ecx),%edx
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#if defined(SWTCH_OPTIM_STATS)
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incl _swtch_optim_stats
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#endif
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/* switch address space */
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movl %cr3,%ebx
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cmpl PCB_CR3(%edx),%ebx
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je 4f
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#if defined(SWTCH_OPTIM_STATS)
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decl _swtch_optim_stats
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incl _tlb_flush_count
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#endif
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movl PCB_CR3(%edx),%ebx
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movl %ebx,%cr3
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4:
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#ifdef SMP
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movl _cpuid, %esi
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#else
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xorl %esi, %esi
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#endif
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cmpl $0, PCB_EXT(%edx) /* has pcb extension? */
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je 1f
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btsl %esi, _private_tss /* mark use of private tss */
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movl PCB_EXT(%edx), %edi /* new tss descriptor */
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jmp 2f
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1:
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/* update common_tss.tss_esp0 pointer */
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movl %edx, %ebx /* pcb */
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addl $(UPAGES * PAGE_SIZE - 16), %ebx
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movl %ebx, _common_tss + TSS_ESP0
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btrl %esi, _private_tss
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jae 3f
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#ifdef SMP
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movl $gd_common_tssd, %edi
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addl %fs:0, %edi
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#else
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movl $_common_tssd, %edi
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#endif
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2:
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/* move correct tss descriptor into GDT slot, then reload tr */
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movl _tss_gdt, %ebx /* entry in GDT */
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movl 0(%edi), %eax
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movl %eax, 0(%ebx)
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movl 4(%edi), %eax
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movl %eax, 4(%ebx)
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movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
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ltr %si
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3:
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movl P_VMSPACE(%ecx), %ebx
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#ifdef SMP
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movl _cpuid, %eax
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#else
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xorl %eax, %eax
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#endif
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btsl %eax, VM_PMAP+PM_ACTIVE(%ebx)
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/* restore context */
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movl PCB_EBX(%edx),%ebx
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movl PCB_ESP(%edx),%esp
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movl PCB_EBP(%edx),%ebp
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movl PCB_ESI(%edx),%esi
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movl PCB_EDI(%edx),%edi
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movl PCB_EIP(%edx),%eax
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movl %eax,(%esp)
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#ifdef SMP
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#ifdef GRAB_LOPRIO /* hold LOPRIO for INTs */
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#ifdef CHEAP_TPR
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movl $0, lapic_tpr
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#else
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andl $~APIC_TPR_PRIO, lapic_tpr
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#endif /** CHEAP_TPR */
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#endif /** GRAB_LOPRIO */
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movl _cpuid,%eax
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movb %al, P_ONCPU(%ecx)
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#endif /* SMP */
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movl %edx, _curpcb
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movl %ecx, _curproc /* into next process */
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#ifdef SMP
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/* XXX FIXME: we should be restoring the local APIC TPR */
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#endif /* SMP */
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#ifdef USER_LDT
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cmpl $0, PCB_USERLDT(%edx)
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jnz 1f
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movl __default_ldt,%eax
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cmpl _currentldt,%eax
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je 2f
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lldt __default_ldt
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movl %eax,_currentldt
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jmp 2f
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1: pushl %edx
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call _set_user_ldt
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popl %edx
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2:
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#endif
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/* This must be done after loading the user LDT. */
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.globl cpu_switch_load_gs
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cpu_switch_load_gs:
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movl PCB_GS(%edx),%gs
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/* test if debug regisers should be restored */
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movb PCB_FLAGS(%edx),%al
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andb $PCB_DBREGS,%al
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jz 1f /* no, skip over */
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movl PCB_DR6(%edx),%eax /* yes, do the restore */
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movl %eax,%dr6
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movl PCB_DR3(%edx),%eax
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movl %eax,%dr3
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movl PCB_DR2(%edx),%eax
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movl %eax,%dr2
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movl PCB_DR1(%edx),%eax
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movl %eax,%dr1
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movl PCB_DR0(%edx),%eax
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movl %eax,%dr0
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movl PCB_DR7(%edx),%eax
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movl %eax,%dr7
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1:
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/*
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* restore sched_lock recursion count and transfer ownership to
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* new process
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*/
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movl PCB_SCHEDNEST(%edx),%eax
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movl %eax,_sched_lock+MTX_RECURSE
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movl _curproc,%eax
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movl %eax,_sched_lock+MTX_LOCK
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#ifdef DIAGNOSTIC
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pushfl
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popl %ecx
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testl $0x200, %ecx /* interrupts enabled? */
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jnz badsw6 /* that way madness lies */
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#endif
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ret
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CROSSJUMPTARGET(sw1a)
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#ifdef DIAGNOSTIC
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badsw1:
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pushl $sw0_1
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call _panic
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sw0_1: .asciz "cpu_switch: has wchan"
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badsw2:
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pushl $sw0_2
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call _panic
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sw0_2: .asciz "cpu_switch: not SRUN"
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badsw3:
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pushl $sw0_3
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call _panic
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sw0_3: .asciz "cpu_switch: chooseproc returned NULL"
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#endif
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#ifdef DIAGNOSTIC
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badsw5:
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pushl $sw0_5
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call _panic
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sw0_5: .asciz "cpu_switch: interrupts enabled (again)"
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badsw6:
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pushl $sw0_6
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call _panic
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sw0_6: .asciz "cpu_switch: interrupts enabled"
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#endif
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/*
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* savectx(pcb)
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* Update pcb, saving current processor state.
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*/
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ENTRY(savectx)
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/* fetch PCB */
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movl 4(%esp),%ecx
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/* caller's return address - child won't execute this routine */
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movl (%esp),%eax
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movl %eax,PCB_EIP(%ecx)
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movl %ebx,PCB_EBX(%ecx)
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movl %esp,PCB_ESP(%ecx)
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movl %ebp,PCB_EBP(%ecx)
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movl %esi,PCB_ESI(%ecx)
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movl %edi,PCB_EDI(%ecx)
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movl %gs,PCB_GS(%ecx)
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#if NNPX > 0
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/*
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* If npxproc == NULL, then the npx h/w state is irrelevant and the
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* state had better already be in the pcb. This is true for forks
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* but not for dumps (the old book-keeping with FP flags in the pcb
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* always lost for dumps because the dump pcb has 0 flags).
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*
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* If npxproc != NULL, then we have to save the npx h/w state to
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* npxproc's pcb and copy it to the requested pcb, or save to the
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* requested pcb and reload. Copying is easier because we would
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* have to handle h/w bugs for reloading. We used to lose the
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* parent's npx state for forks by forgetting to reload.
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*/
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movl _npxproc,%eax
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testl %eax,%eax
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je 1f
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pushl %ecx
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movl P_ADDR(%eax),%eax
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leal PCB_SAVEFPU(%eax),%eax
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pushl %eax
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pushl %eax
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call _npxsave
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addl $4,%esp
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popl %eax
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popl %ecx
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pushl $PCB_SAVEFPU_SIZE
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leal PCB_SAVEFPU(%ecx),%ecx
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pushl %ecx
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pushl %eax
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call _bcopy
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addl $12,%esp
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#endif /* NNPX > 0 */
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1:
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ret
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