2c7cd4307b
present in the GNU dts files. Submitted by: John Wehle Reviewed by: imp
396 lines
10 KiB
C
396 lines
10 KiB
C
/*-
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* Copyright 2013-2015 John Wehle <john@feith.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/*
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* Amlogic aml8726 timer driver.
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*
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* 16 bit Timer A is used for the event timer / hard clock.
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* 32 bit Timer E is used for the timecounter / DELAY.
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*
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* The current implementation doesn't use Timers B-D. Another approach is
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* to split the timers between the cores implementing per cpu event timers.
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*
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* The timers all share the MUX register which requires a mutex to serialize
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* access. The mutex is also used to avoid potential problems between the
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* interrupt handler and timer_start / timer_stop.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/timetc.h>
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#include <sys/timeet.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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struct aml8726_timer_softc {
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device_t dev;
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struct resource * res[2];
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struct mtx mtx;
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void * ih_cookie;
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struct eventtimer et;
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uint32_t first_ticks;
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uint32_t period_ticks;
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struct timecounter tc;
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};
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static struct resource_spec aml8726_timer_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE }, /* INT_TIMER_A */
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{ -1, 0 }
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};
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/*
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* devclass_get_device / device_get_softc could be used
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* to dynamically locate this, however the timers are a
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* required device which can't be unloaded so there's
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* no need for the overhead.
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*/
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static struct aml8726_timer_softc *aml8726_timer_sc = NULL;
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#define AML_TIMER_LOCK(sc) mtx_lock_spin(&(sc)->mtx)
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#define AML_TIMER_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx)
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#define AML_TIMER_LOCK_INIT(sc) \
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mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \
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"timer", MTX_SPIN)
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#define AML_TIMER_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx);
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#define AML_TIMER_MUX_REG 0
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#define AML_TIMER_INPUT_1us 0
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#define AML_TIMER_INPUT_10us 1
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#define AML_TIMER_INPUT_100us 2
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#define AML_TIMER_INPUT_1ms 3
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#define AML_TIMER_INPUT_MASK 3
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#define AML_TIMER_A_INPUT_MASK 3
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#define AML_TIMER_A_INPUT_SHIFT 0
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#define AML_TIMER_B_INPUT_MASK (3 << 2)
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#define AML_TIMER_B_INPUT_SHIFT 2
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#define AML_TIMER_C_INPUT_MASK (3 << 4)
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#define AML_TIMER_C_INPUT_SHIFT 4
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#define AML_TIMER_D_INPUT_MASK (3 << 6)
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#define AML_TIMER_D_INPUT_SHIFT 6
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#define AML_TIMER_E_INPUT_SYS 0
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#define AML_TIMER_E_INPUT_1us 1
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#define AML_TIMER_E_INPUT_10us 2
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#define AML_TIMER_E_INPUT_100us 3
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#define AML_TIMER_E_INPUT_1ms 4
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#define AML_TIMER_E_INPUT_MASK (7 << 8)
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#define AML_TIMER_E_INPUT_SHIFT 8
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#define AML_TIMER_A_PERIODIC (1 << 12)
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#define AML_TIMER_B_PERIODIC (1 << 13)
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#define AML_TIMER_C_PERIODIC (1 << 14)
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#define AML_TIMER_D_PERIODIC (1 << 15)
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#define AML_TIMER_A_EN (1 << 16)
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#define AML_TIMER_B_EN (1 << 17)
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#define AML_TIMER_C_EN (1 << 18)
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#define AML_TIMER_D_EN (1 << 19)
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#define AML_TIMER_E_EN (1 << 20)
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#define AML_TIMER_A_REG 4
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#define AML_TIMER_B_REG 8
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#define AML_TIMER_C_REG 12
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#define AML_TIMER_D_REG 16
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#define AML_TIMER_E_REG 20
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#define CSR_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], reg, (val))
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#define CSR_READ_4(sc, reg) bus_read_4((sc)->res[0], reg)
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static unsigned
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aml8726_get_timecount(struct timecounter *tc)
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{
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struct aml8726_timer_softc *sc =
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(struct aml8726_timer_softc *)tc->tc_priv;
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return CSR_READ_4(sc, AML_TIMER_E_REG);
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}
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static int
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aml8726_hardclock(void *arg)
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{
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struct aml8726_timer_softc *sc = (struct aml8726_timer_softc *)arg;
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AML_TIMER_LOCK(sc);
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if (sc->first_ticks != 0 && sc->period_ticks != 0) {
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sc->first_ticks = 0;
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CSR_WRITE_4(sc, AML_TIMER_A_REG, sc->period_ticks);
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CSR_WRITE_4(sc, AML_TIMER_MUX_REG,
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(CSR_READ_4(sc, AML_TIMER_MUX_REG) |
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AML_TIMER_A_PERIODIC | AML_TIMER_A_EN));
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}
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AML_TIMER_UNLOCK(sc);
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if (sc->et.et_active)
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sc->et.et_event_cb(&sc->et, sc->et.et_arg);
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return (FILTER_HANDLED);
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}
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static int
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aml8726_timer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
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{
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struct aml8726_timer_softc *sc =
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(struct aml8726_timer_softc *)et->et_priv;
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uint32_t first_ticks;
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uint32_t period_ticks;
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uint32_t periodic;
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uint32_t ticks;
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first_ticks = (first * et->et_frequency) / SBT_1S;
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period_ticks = (period * et->et_frequency) / SBT_1S;
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if (first_ticks != 0) {
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ticks = first_ticks;
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periodic = 0;
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} else {
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ticks = period_ticks;
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periodic = AML_TIMER_A_PERIODIC;
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}
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if (ticks == 0)
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return (EINVAL);
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AML_TIMER_LOCK(sc);
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sc->first_ticks = first_ticks;
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sc->period_ticks = period_ticks;
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CSR_WRITE_4(sc, AML_TIMER_A_REG, ticks);
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CSR_WRITE_4(sc, AML_TIMER_MUX_REG,
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((CSR_READ_4(sc, AML_TIMER_MUX_REG) & ~AML_TIMER_A_PERIODIC) |
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AML_TIMER_A_EN | periodic));
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AML_TIMER_UNLOCK(sc);
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return (0);
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}
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static int
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aml8726_timer_stop(struct eventtimer *et)
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{
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struct aml8726_timer_softc *sc =
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(struct aml8726_timer_softc *)et->et_priv;
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AML_TIMER_LOCK(sc);
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CSR_WRITE_4(sc, AML_TIMER_MUX_REG,
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(CSR_READ_4(sc, AML_TIMER_MUX_REG) & ~AML_TIMER_A_EN));
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AML_TIMER_UNLOCK(sc);
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return (0);
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}
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static int
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aml8726_timer_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "amlogic,meson6-timer"))
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return (ENXIO);
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device_set_desc(dev, "Amlogic aml8726 timer");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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aml8726_timer_attach(device_t dev)
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{
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struct aml8726_timer_softc *sc = device_get_softc(dev);
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/* There should be exactly one instance. */
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if (aml8726_timer_sc != NULL)
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return (ENXIO);
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sc->dev = dev;
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if (bus_alloc_resources(dev, aml8726_timer_spec, sc->res)) {
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device_printf(dev, "can not allocate resources for device\n");
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return (ENXIO);
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}
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/*
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* Disable the timers, select the input for each timer,
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* clear timer E, and then enable timer E.
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*/
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CSR_WRITE_4(sc, AML_TIMER_MUX_REG,
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((CSR_READ_4(sc, AML_TIMER_MUX_REG) &
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~(AML_TIMER_A_EN | AML_TIMER_A_INPUT_MASK |
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AML_TIMER_E_EN | AML_TIMER_E_INPUT_MASK)) |
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(AML_TIMER_INPUT_1us << AML_TIMER_A_INPUT_SHIFT) |
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(AML_TIMER_E_INPUT_1us << AML_TIMER_E_INPUT_SHIFT)));
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CSR_WRITE_4(sc, AML_TIMER_E_REG, 0);
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CSR_WRITE_4(sc, AML_TIMER_MUX_REG,
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(CSR_READ_4(sc, AML_TIMER_MUX_REG) | AML_TIMER_E_EN));
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/*
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* Initialize the mutex prior to installing the interrupt handler
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* in case of a spurious interrupt.
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*/
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AML_TIMER_LOCK_INIT(sc);
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if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_CLK,
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aml8726_hardclock, NULL, sc, &sc->ih_cookie)) {
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device_printf(dev, "could not setup interrupt handler\n");
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bus_release_resources(dev, aml8726_timer_spec, sc->res);
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AML_TIMER_LOCK_DESTROY(sc);
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return (ENXIO);
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}
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aml8726_timer_sc = sc;
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sc->et.et_name = "aml8726 timer A";
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sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT;
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sc->et.et_frequency = 1000000;
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sc->et.et_quality = 1000;
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sc->et.et_min_period = (0x00000002LLU * SBT_1S) / sc->et.et_frequency;
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sc->et.et_max_period = (0x0000fffeLLU * SBT_1S) / sc->et.et_frequency;
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sc->et.et_start = aml8726_timer_start;
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sc->et.et_stop = aml8726_timer_stop;
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sc->et.et_priv = sc;
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et_register(&sc->et);
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sc->tc.tc_get_timecount = aml8726_get_timecount;
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sc->tc.tc_name = "aml8726 timer E";
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sc->tc.tc_frequency = 1000000;
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sc->tc.tc_counter_mask = ~0u;
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sc->tc.tc_quality = 1000;
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sc->tc.tc_priv = sc;
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tc_init(&sc->tc);
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return (0);
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}
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static int
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aml8726_timer_detach(device_t dev)
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{
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return (EBUSY);
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}
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static device_method_t aml8726_timer_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, aml8726_timer_probe),
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DEVMETHOD(device_attach, aml8726_timer_attach),
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DEVMETHOD(device_detach, aml8726_timer_detach),
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DEVMETHOD_END
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};
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static driver_t aml8726_timer_driver = {
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"timer",
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aml8726_timer_methods,
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sizeof(struct aml8726_timer_softc),
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};
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static devclass_t aml8726_timer_devclass;
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EARLY_DRIVER_MODULE(timer, simplebus, aml8726_timer_driver,
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aml8726_timer_devclass, 0, 0, BUS_PASS_TIMER);
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void
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DELAY(int usec)
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{
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uint32_t counter;
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uint32_t delta, now, previous, remaining;
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/* Timer has not yet been initialized */
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if (aml8726_timer_sc == NULL) {
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for (; usec > 0; usec--)
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for (counter = 200; counter > 0; counter--) {
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/* Prevent gcc from optimizing out the loop */
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cpufunc_nullop();
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}
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return;
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}
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/*
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* Some of the other timers in the source tree do this calculation as:
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*
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* usec * ((sc->tc.tc_frequency / 1000000) + 1)
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*
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* which gives a fairly pessimistic result when tc_frequency is an exact
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* multiple of 1000000. Given the data type and typical values for
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* tc_frequency adding 999999 shouldn't overflow.
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*/
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remaining = usec * ((aml8726_timer_sc->tc.tc_frequency + 999999) /
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1000000);
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/*
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* We add one since the first iteration may catch the counter just
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* as it is changing.
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*/
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remaining += 1;
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previous = aml8726_get_timecount(&aml8726_timer_sc->tc);
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for ( ; ; ) {
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now = aml8726_get_timecount(&aml8726_timer_sc->tc);
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/*
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* If the timer has rolled over, then we have the case:
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*
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* if (previous > now) {
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* delta = (0 - previous) + now
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* }
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*
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* which is really no different then the normal case.
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* Both cases are simply:
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*
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* delta = now - previous.
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*/
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delta = now - previous;
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if (delta >= remaining)
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break;
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previous = now;
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remaining -= delta;
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}
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}
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