3c838a9f51
Support 7xxx adapters including firmware-assisted TSO and VLAN tagging: - Solarflare Flareon Ultra 7000 series 10/40G adapters: - Solarflare SFN7042Q QSFP+ Server Adapter - Solarflare SFN7142Q QSFP+ Server Adapter - Solarflare Flareon Ultra 7000 series 10G adapters: - Solarflare SFN7022F SFP+ Server Adapter - Solarflare SFN7122F SFP+ Server Adapter - Solarflare SFN7322F Precision Time Synchronization Server Adapter - Solarflare Flareon 7000 series 10G adapters: - Solarflare SFN7002F SFP+ Server Adapter Support utilities to configure adapters and update firmware. The work is done by Solarflare developers (Andy Moreton, Andrew Lee and many others), Artem V. Andreev <Artem.Andreev at oktetlabs.ru> and me. Sponsored by: Solarflare Communications, Inc. MFC after: 2 weeks Causually read by: gnn Differential Revision: https://reviews.freebsd.org/D2618
433 lines
11 KiB
C
433 lines
11 KiB
C
/*-
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* Copyright (c) 2010-2015 Solarflare Communications Inc.
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* All rights reserved.
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*
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* This software was developed in part by Philip Paeps under contract for
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* Solarflare Communications, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are
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* those of the authors and should not be interpreted as representing official
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* policies, either expressed or implied, of the FreeBSD Project.
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*
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* $FreeBSD$
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*/
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#ifndef _SFXGE_H
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#define _SFXGE_H
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/sysctl.h>
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#include <sys/sx.h>
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#include <vm/uma.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include "sfxge_ioc.h"
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/*
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* Debugging
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*/
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#if 0
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#define DBGPRINT(dev, fmt, args...) \
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device_printf(dev, "%s: " fmt "\n", __func__, ## args)
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#else
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#define DBGPRINT(dev, fmt, args...)
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#endif
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/*
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* Backward-compatibility
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*/
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#ifndef CACHE_LINE_SIZE
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/* This should be right on most machines the driver will be used on, and
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* we needn't care too much about wasting a few KB per interface.
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*/
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#define CACHE_LINE_SIZE 128
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#endif
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#ifndef IFCAP_LINKSTATE
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#define IFCAP_LINKSTATE 0
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#endif
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#ifndef IFCAP_VLAN_HWTSO
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#define IFCAP_VLAN_HWTSO 0
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#endif
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#ifndef IFM_10G_T
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#define IFM_10G_T IFM_UNKNOWN
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#endif
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#ifndef IFM_10G_KX4
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#define IFM_10G_KX4 IFM_10G_CX4
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#endif
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#ifndef IFM_40G_CR4
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#define IFM_40G_CR4 IFM_UNKNOWN
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#endif
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#if (__FreeBSD_version >= 800501 && __FreeBSD_version < 900000) || \
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__FreeBSD_version >= 900003
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#define SFXGE_HAVE_DESCRIBE_INTR
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#endif
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#ifdef IFM_ETH_RXPAUSE
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#define SFXGE_HAVE_PAUSE_MEDIAOPTS
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#endif
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#ifndef CTLTYPE_U64
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#define CTLTYPE_U64 CTLTYPE_QUAD
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#endif
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#include "sfxge_rx.h"
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#include "sfxge_tx.h"
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#define ROUNDUP_POW_OF_TWO(_n) (1ULL << flsl((_n) - 1))
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#define SFXGE_IP_ALIGN 2
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#define SFXGE_ETHERTYPE_LOOPBACK 0x9000 /* Xerox loopback */
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enum sfxge_evq_state {
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SFXGE_EVQ_UNINITIALIZED = 0,
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SFXGE_EVQ_INITIALIZED,
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SFXGE_EVQ_STARTING,
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SFXGE_EVQ_STARTED
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};
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#define SFXGE_EV_BATCH 16384
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struct sfxge_evq {
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/* Structure members below are sorted by usage order */
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struct sfxge_softc *sc;
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struct mtx lock;
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unsigned int index;
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enum sfxge_evq_state init_state;
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efsys_mem_t mem;
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efx_evq_t *common;
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unsigned int read_ptr;
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boolean_t exception;
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unsigned int rx_done;
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unsigned int tx_done;
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/* Linked list of TX queues with completions to process */
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struct sfxge_txq *txq;
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struct sfxge_txq **txqs;
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/* Structure members not used on event processing path */
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unsigned int buf_base_id;
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unsigned int entries;
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char lock_name[SFXGE_LOCK_NAME_MAX];
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} __aligned(CACHE_LINE_SIZE);
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#define SFXGE_NDESCS 1024
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#define SFXGE_MODERATION 30
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enum sfxge_intr_state {
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SFXGE_INTR_UNINITIALIZED = 0,
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SFXGE_INTR_INITIALIZED,
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SFXGE_INTR_TESTING,
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SFXGE_INTR_STARTED
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};
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struct sfxge_intr_hdl {
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int eih_rid;
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void *eih_tag;
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struct resource *eih_res;
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};
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struct sfxge_intr {
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enum sfxge_intr_state state;
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struct resource *msix_res;
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struct sfxge_intr_hdl *table;
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int n_alloc;
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int type;
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efsys_mem_t status;
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uint32_t zero_count;
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};
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enum sfxge_mcdi_state {
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SFXGE_MCDI_UNINITIALIZED = 0,
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SFXGE_MCDI_INITIALIZED,
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SFXGE_MCDI_BUSY,
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SFXGE_MCDI_COMPLETED
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};
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struct sfxge_mcdi {
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struct mtx lock;
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efsys_mem_t mem;
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enum sfxge_mcdi_state state;
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efx_mcdi_transport_t transport;
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/* Only used in debugging output */
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char lock_name[SFXGE_LOCK_NAME_MAX];
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};
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struct sfxge_hw_stats {
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clock_t update_time;
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efsys_mem_t dma_buf;
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void *decode_buf;
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};
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enum sfxge_port_state {
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SFXGE_PORT_UNINITIALIZED = 0,
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SFXGE_PORT_INITIALIZED,
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SFXGE_PORT_STARTED
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};
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struct sfxge_port {
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struct sfxge_softc *sc;
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struct mtx lock;
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enum sfxge_port_state init_state;
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#ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS
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unsigned int wanted_fc;
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#endif
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struct sfxge_hw_stats phy_stats;
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struct sfxge_hw_stats mac_stats;
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efx_link_mode_t link_mode;
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uint8_t mcast_addrs[EFX_MAC_MULTICAST_LIST_MAX *
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EFX_MAC_ADDR_LEN];
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unsigned int mcast_count;
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/* Only used in debugging output */
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char lock_name[SFXGE_LOCK_NAME_MAX];
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};
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enum sfxge_softc_state {
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SFXGE_UNINITIALIZED = 0,
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SFXGE_INITIALIZED,
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SFXGE_REGISTERED,
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SFXGE_STARTED
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};
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struct sfxge_softc {
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device_t dev;
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struct sx softc_lock;
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char softc_lock_name[SFXGE_LOCK_NAME_MAX];
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enum sfxge_softc_state init_state;
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struct ifnet *ifnet;
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unsigned int if_flags;
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struct sysctl_oid *stats_node;
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struct sysctl_oid *txqs_node;
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struct task task_reset;
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efx_family_t family;
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caddr_t vpd_data;
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size_t vpd_size;
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efx_nic_t *enp;
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efsys_lock_t enp_lock;
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unsigned int rxq_entries;
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unsigned int txq_entries;
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bus_dma_tag_t parent_dma_tag;
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efsys_bar_t bar;
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struct sfxge_intr intr;
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struct sfxge_mcdi mcdi;
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struct sfxge_port port;
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uint32_t buffer_table_next;
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struct sfxge_evq *evq[SFXGE_RX_SCALE_MAX];
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unsigned int ev_moderation;
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#if EFSYS_OPT_QSTATS
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clock_t ev_stats_update_time;
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uint64_t ev_stats[EV_NQSTATS];
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#endif
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unsigned int max_rss_channels;
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uma_zone_t rxq_cache;
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struct sfxge_rxq *rxq[SFXGE_RX_SCALE_MAX];
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unsigned int rx_indir_table[SFXGE_RX_SCALE_MAX];
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struct sfxge_txq *txq[SFXGE_TXQ_NTYPES + SFXGE_RX_SCALE_MAX];
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struct ifmedia media;
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size_t rx_prefix_size;
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size_t rx_buffer_size;
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size_t rx_buffer_align;
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uma_zone_t rx_buffer_zone;
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unsigned int evq_max;
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unsigned int evq_count;
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unsigned int rxq_count;
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unsigned int txq_count;
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int tso_fw_assisted;
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};
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#define SFXGE_LINK_UP(sc) ((sc)->port.link_mode != EFX_LINK_DOWN)
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#define SFXGE_RUNNING(sc) ((sc)->ifnet->if_drv_flags & IFF_DRV_RUNNING)
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#define SFXGE_PARAM(_name) "hw.sfxge." #_name
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SYSCTL_DECL(_hw_sfxge);
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/*
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* From sfxge.c.
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*/
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extern void sfxge_schedule_reset(struct sfxge_softc *sc);
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extern void sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n,
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uint32_t *idp);
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/*
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* From sfxge_dma.c.
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*/
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extern int sfxge_dma_init(struct sfxge_softc *sc);
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extern void sfxge_dma_fini(struct sfxge_softc *sc);
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extern int sfxge_dma_alloc(struct sfxge_softc *sc, bus_size_t len,
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efsys_mem_t *esmp);
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extern void sfxge_dma_free(efsys_mem_t *esmp);
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extern int sfxge_dma_map_sg_collapse(bus_dma_tag_t tag, bus_dmamap_t map,
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struct mbuf **mp,
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bus_dma_segment_t *segs,
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int *nsegs, int maxsegs);
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/*
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* From sfxge_ev.c.
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*/
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extern int sfxge_ev_init(struct sfxge_softc *sc);
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extern void sfxge_ev_fini(struct sfxge_softc *sc);
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extern int sfxge_ev_start(struct sfxge_softc *sc);
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extern void sfxge_ev_stop(struct sfxge_softc *sc);
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extern int sfxge_ev_qpoll(struct sfxge_evq *evq);
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/*
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* From sfxge_intr.c.
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*/
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extern int sfxge_intr_init(struct sfxge_softc *sc);
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extern void sfxge_intr_fini(struct sfxge_softc *sc);
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extern int sfxge_intr_start(struct sfxge_softc *sc);
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extern void sfxge_intr_stop(struct sfxge_softc *sc);
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/*
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* From sfxge_mcdi.c.
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*/
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extern int sfxge_mcdi_init(struct sfxge_softc *sc);
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extern void sfxge_mcdi_fini(struct sfxge_softc *sc);
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extern int sfxge_mcdi_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip);
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/*
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* From sfxge_nvram.c.
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*/
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extern int sfxge_nvram_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ip);
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/*
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* From sfxge_port.c.
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*/
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extern int sfxge_port_init(struct sfxge_softc *sc);
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extern void sfxge_port_fini(struct sfxge_softc *sc);
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extern int sfxge_port_start(struct sfxge_softc *sc);
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extern void sfxge_port_stop(struct sfxge_softc *sc);
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extern void sfxge_mac_link_update(struct sfxge_softc *sc,
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efx_link_mode_t mode);
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extern int sfxge_mac_filter_set(struct sfxge_softc *sc);
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extern int sfxge_port_ifmedia_init(struct sfxge_softc *sc);
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extern uint64_t sfxge_get_counter(struct ifnet *ifp, ift_counter c);
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#define SFXGE_MAX_MTU (9 * 1024)
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#define SFXGE_ADAPTER_LOCK_INIT(_sc, _ifname) \
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do { \
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struct sfxge_softc *__sc = (_sc); \
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\
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snprintf((__sc)->softc_lock_name, \
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sizeof((__sc)->softc_lock_name), \
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"%s:softc", (_ifname)); \
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sx_init(&(__sc)->softc_lock, (__sc)->softc_lock_name); \
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} while (B_FALSE)
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#define SFXGE_ADAPTER_LOCK_DESTROY(_sc) \
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sx_destroy(&(_sc)->softc_lock)
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#define SFXGE_ADAPTER_LOCK(_sc) \
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sx_xlock(&(_sc)->softc_lock)
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#define SFXGE_ADAPTER_UNLOCK(_sc) \
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sx_xunlock(&(_sc)->softc_lock)
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#define SFXGE_ADAPTER_LOCK_ASSERT_OWNED(_sc) \
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sx_assert(&(_sc)->softc_lock, LA_XLOCKED)
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#define SFXGE_PORT_LOCK_INIT(_port, _ifname) \
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do { \
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struct sfxge_port *__port = (_port); \
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\
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snprintf((__port)->lock_name, \
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sizeof((__port)->lock_name), \
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"%s:port", (_ifname)); \
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mtx_init(&(__port)->lock, (__port)->lock_name, \
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NULL, MTX_DEF); \
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} while (B_FALSE)
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#define SFXGE_PORT_LOCK_DESTROY(_port) \
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mtx_destroy(&(_port)->lock)
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#define SFXGE_PORT_LOCK(_port) \
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mtx_lock(&(_port)->lock)
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#define SFXGE_PORT_UNLOCK(_port) \
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mtx_unlock(&(_port)->lock)
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#define SFXGE_PORT_LOCK_ASSERT_OWNED(_port) \
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mtx_assert(&(_port)->lock, MA_OWNED)
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#define SFXGE_MCDI_LOCK_INIT(_mcdi, _ifname) \
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do { \
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struct sfxge_mcdi *__mcdi = (_mcdi); \
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\
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snprintf((__mcdi)->lock_name, \
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sizeof((__mcdi)->lock_name), \
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"%s:mcdi", (_ifname)); \
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mtx_init(&(__mcdi)->lock, (__mcdi)->lock_name, \
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NULL, MTX_DEF); \
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} while (B_FALSE)
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#define SFXGE_MCDI_LOCK_DESTROY(_mcdi) \
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mtx_destroy(&(_mcdi)->lock)
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#define SFXGE_MCDI_LOCK(_mcdi) \
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mtx_lock(&(_mcdi)->lock)
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#define SFXGE_MCDI_UNLOCK(_mcdi) \
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mtx_unlock(&(_mcdi)->lock)
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#define SFXGE_MCDI_LOCK_ASSERT_OWNED(_mcdi) \
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mtx_assert(&(_mcdi)->lock, MA_OWNED)
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#define SFXGE_EVQ_LOCK_INIT(_evq, _ifname, _evq_index) \
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do { \
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struct sfxge_evq *__evq = (_evq); \
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\
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snprintf((__evq)->lock_name, \
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sizeof((__evq)->lock_name), \
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"%s:evq%u", (_ifname), (_evq_index)); \
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mtx_init(&(__evq)->lock, (__evq)->lock_name, \
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NULL, MTX_DEF); \
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} while (B_FALSE)
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#define SFXGE_EVQ_LOCK_DESTROY(_evq) \
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mtx_destroy(&(_evq)->lock)
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#define SFXGE_EVQ_LOCK(_evq) \
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mtx_lock(&(_evq)->lock)
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#define SFXGE_EVQ_UNLOCK(_evq) \
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mtx_unlock(&(_evq)->lock)
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#define SFXGE_EVQ_LOCK_ASSERT_OWNED(_evq) \
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mtx_assert(&(_evq)->lock, MA_OWNED)
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#endif /* _SFXGE_H */
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