andrew e2a65d5cfa Add support for the uart classes to set their default register shift value. ... This is needed with the pl011 driver. Before this change it would default to a shift of 0, however the hardware places the registers at 4-byte addresses meaning the value should be 2. This patch fixes this for the pl011 when configured using the fdt. The other drivers have a default value of 0 to keep this a no-op. MFC after: 1 week		2015-04-11 17:16:23 +00:00
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board_ln2410sbc.c
files.s3c2xx0
s3c2xx0board.h
s3c2xx0reg.h
s3c2xx0var.h
s3c24x0_clk.c
s3c24x0_machdep.c
s3c24x0_rtc.c
s3c24x0.c
s3c24x0reg.h
s3c24x0var.h
s3c2410reg.h
s3c2410var.h
s3c2440reg.h
std.ln2410sbc
std.s3c2410
uart_bus_s3c2410.c
uart_cpu_s3c2410.c
uart_dev_s3c2410.c
uart_dev_s3c2410.h