KATO Takenori 20916c1f24 - Use 6x86MX' instead of M2'. Cyrix officially use `6x86MX' for the ... CPU code-named `M2'. - Use the result of cpuid instruction instead of DIR to identify 6x86MX cpu. DIR0 and DIR1 are not documented in the data sheet, and cpuid instruction is enabled at reset time. - Add a function, init_6x86MX() to initialize 6x86MX cpu. It supports CPU_SUSP_HLT and CPU_IORT options. It always sets NC1 (640K - 1M is not cached.), and enables L1 cache in write-back mode. - Fix typo in the comment in identblue().		1997-05-31 08:45:24 +00:00
..
amd64	- Use 6x86MX' instead of M2'. Cyrix officially use `6x86MX' for the	1997-05-31 08:45:24 +00:00
conf	GENERIC, LINT:	1997-04-14 00:35:25 +00:00
include	Code such as apic_base[APIC_ID] converted to lapic__id	1997-05-29 05:58:41 +00:00
isa	Added code to manage the local and io APICs as structures.	1997-05-29 05:56:12 +00:00
pci	Yet another fix for configuration mechanism 1 register accesses:	1997-05-26 21:52:41 +00:00
Makefile	Back out part 1 of the MCFH that changed $Id$ to $FreeBSD$. We are not	1997-02-22 09:48:43 +00:00