d1caaa9300
--Remove special-case handling of sparc64 bus_dmamap* functions. Replace with a more generic mechanism that allows MD busdma implementations to generate inline mapping functions by defining WANT_INLINE_DMAMAP in <machine/bus_dma.h>. This is currently useful for sparc64, x86, and arm64, which all implement non-load dmamap operations as simple wrappers around map objects which may be bus- or device-specific. --Remove NULL-checked bus_dmamap macros. Implement the equivalent NULL checks in the inlined x86 implementation. For non-x86 platforms, these checks are a minor pessimization as those platforms do not currently allow NULL maps. NULL maps were originally allowed on arm64, which appears to have been the motivation behind adding arm[64]-specific barriers to bus_dma.h, but that support was removed in r299463. --Simplify the internal interface used by the bus_dmamap_load* variants and move it to bus_dma_internal.h --Fix some drivers that directly include sys/bus_dma.h despite the recommendations of bus_dma(9) Reviewed by: kib (previous revision), marius Differential Revision: https://reviews.freebsd.org/D10729
674 lines
14 KiB
C
674 lines
14 KiB
C
/*-
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* Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/queue.h>
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#include <sys/kobj.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/limits.h>
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#include <sys/lock.h>
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#include <sys/sysctl.h>
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#include <sys/systm.h>
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#include <sys/sx.h>
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#include <machine/bus.h>
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#ifdef FDT
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#endif
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#include <dev/xdma/xdma.h>
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#include <xdma_if.h>
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MALLOC_DEFINE(M_XDMA, "xdma", "xDMA framework");
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/*
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* Multiple xDMA controllers may work with single DMA device,
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* so we have global lock for physical channel management.
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*/
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static struct mtx xdma_mtx;
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#define XDMA_LOCK() mtx_lock(&xdma_mtx)
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#define XDMA_UNLOCK() mtx_unlock(&xdma_mtx)
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#define XDMA_ASSERT_LOCKED() mtx_assert(&xdma_mtx, MA_OWNED)
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/*
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* Per channel locks.
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*/
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#define XCHAN_LOCK(xchan) mtx_lock(&(xchan)->mtx_lock)
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#define XCHAN_UNLOCK(xchan) mtx_unlock(&(xchan)->mtx_lock)
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#define XCHAN_ASSERT_LOCKED(xchan) mtx_assert(&(xchan)->mtx_lock, MA_OWNED)
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/*
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* Allocate virtual xDMA channel.
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*/
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xdma_channel_t *
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xdma_channel_alloc(xdma_controller_t *xdma)
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{
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xdma_channel_t *xchan;
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int ret;
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xchan = malloc(sizeof(xdma_channel_t), M_XDMA, M_WAITOK | M_ZERO);
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if (xchan == NULL) {
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device_printf(xdma->dev,
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"%s: Can't allocate memory for channel.\n", __func__);
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return (NULL);
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}
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xchan->xdma = xdma;
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XDMA_LOCK();
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/* Request a real channel from hardware driver. */
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ret = XDMA_CHANNEL_ALLOC(xdma->dma_dev, xchan);
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if (ret != 0) {
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device_printf(xdma->dev,
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"%s: Can't request hardware channel.\n", __func__);
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XDMA_UNLOCK();
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free(xchan, M_XDMA);
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return (NULL);
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}
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TAILQ_INIT(&xchan->ie_handlers);
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mtx_init(&xchan->mtx_lock, "xDMA", NULL, MTX_DEF);
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TAILQ_INSERT_TAIL(&xdma->channels, xchan, xchan_next);
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XDMA_UNLOCK();
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return (xchan);
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}
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int
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xdma_channel_free(xdma_channel_t *xchan)
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{
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xdma_controller_t *xdma;
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int err;
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xdma = xchan->xdma;
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XDMA_LOCK();
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/* Free the real DMA channel. */
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err = XDMA_CHANNEL_FREE(xdma->dma_dev, xchan);
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if (err != 0) {
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device_printf(xdma->dev,
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"%s: Can't free real hw channel.\n", __func__);
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XDMA_UNLOCK();
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return (-1);
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}
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xdma_teardown_all_intr(xchan);
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/* Deallocate descriptors, if any. */
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xdma_desc_free(xchan);
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mtx_destroy(&xchan->mtx_lock);
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TAILQ_REMOVE(&xdma->channels, xchan, xchan_next);
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free(xchan, M_XDMA);
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XDMA_UNLOCK();
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return (0);
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}
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int
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xdma_setup_intr(xdma_channel_t *xchan, int (*cb)(void *), void *arg,
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void **ihandler)
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{
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struct xdma_intr_handler *ih;
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xdma_controller_t *xdma;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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/* Sanity check. */
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if (cb == NULL) {
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device_printf(xdma->dev,
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"%s: Can't setup interrupt handler.\n",
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__func__);
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return (-1);
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}
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ih = malloc(sizeof(struct xdma_intr_handler),
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M_XDMA, M_WAITOK | M_ZERO);
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if (ih == NULL) {
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device_printf(xdma->dev,
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"%s: Can't allocate memory for interrupt handler.\n",
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__func__);
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return (-1);
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}
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ih->cb = cb;
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ih->cb_user = arg;
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TAILQ_INSERT_TAIL(&xchan->ie_handlers, ih, ih_next);
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if (ihandler != NULL) {
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*ihandler = ih;
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}
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return (0);
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}
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int
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xdma_teardown_intr(xdma_channel_t *xchan, struct xdma_intr_handler *ih)
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{
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xdma_controller_t *xdma;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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/* Sanity check. */
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if (ih == NULL) {
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device_printf(xdma->dev,
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"%s: Can't teardown interrupt.\n", __func__);
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return (-1);
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}
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TAILQ_REMOVE(&xchan->ie_handlers, ih, ih_next);
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free(ih, M_XDMA);
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return (0);
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}
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int
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xdma_teardown_all_intr(xdma_channel_t *xchan)
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{
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struct xdma_intr_handler *ih_tmp;
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struct xdma_intr_handler *ih;
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xdma_controller_t *xdma;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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TAILQ_FOREACH_SAFE(ih, &xchan->ie_handlers, ih_next, ih_tmp) {
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TAILQ_REMOVE(&xchan->ie_handlers, ih, ih_next);
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free(ih, M_XDMA);
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}
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return (0);
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}
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static void
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xdma_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err)
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{
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xdma_channel_t *xchan;
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int i;
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xchan = (xdma_channel_t *)arg;
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KASSERT(xchan != NULL, ("xchan is NULL"));
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if (err) {
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xchan->map_err = 1;
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return;
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}
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for (i = 0; i < nseg; i++) {
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xchan->descs_phys[i].ds_addr = segs[i].ds_addr;
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xchan->descs_phys[i].ds_len = segs[i].ds_len;
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}
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}
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static int
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xdma_desc_alloc_bus_dma(xdma_channel_t *xchan, uint32_t desc_size,
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uint32_t align)
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{
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xdma_controller_t *xdma;
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bus_size_t all_desc_sz;
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xdma_config_t *conf;
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int nsegments;
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int err;
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xdma = xchan->xdma;
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conf = &xchan->conf;
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nsegments = conf->block_num;
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all_desc_sz = (nsegments * desc_size);
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err = bus_dma_tag_create(
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bus_get_dma_tag(xdma->dev),
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align, desc_size, /* alignment, boundary */
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BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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all_desc_sz, nsegments, /* maxsize, nsegments*/
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desc_size, 0, /* maxsegsize, flags */
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NULL, NULL, /* lockfunc, lockarg */
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&xchan->dma_tag);
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if (err) {
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device_printf(xdma->dev,
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"%s: Can't create bus_dma tag.\n", __func__);
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return (-1);
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}
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err = bus_dmamem_alloc(xchan->dma_tag, (void **)&xchan->descs,
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BUS_DMA_WAITOK | BUS_DMA_COHERENT, &xchan->dma_map);
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if (err) {
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device_printf(xdma->dev,
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"%s: Can't allocate memory for descriptors.\n", __func__);
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return (-1);
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}
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xchan->descs_phys = malloc(nsegments * sizeof(xdma_descriptor_t), M_XDMA,
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(M_WAITOK | M_ZERO));
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xchan->map_err = 0;
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err = bus_dmamap_load(xchan->dma_tag, xchan->dma_map, xchan->descs,
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all_desc_sz, xdma_dmamap_cb, xchan, BUS_DMA_WAITOK);
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if (err) {
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device_printf(xdma->dev,
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"%s: Can't load DMA map.\n", __func__);
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return (-1);
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}
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if (xchan->map_err != 0) {
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device_printf(xdma->dev,
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"%s: Can't load DMA map.\n", __func__);
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return (-1);
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}
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return (0);
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}
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/*
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* This function called by DMA controller driver.
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*/
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int
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xdma_desc_alloc(xdma_channel_t *xchan, uint32_t desc_size, uint32_t align)
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{
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xdma_controller_t *xdma;
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xdma_config_t *conf;
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int ret;
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XCHAN_ASSERT_LOCKED(xchan);
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xdma = xchan->xdma;
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if (xdma == NULL) {
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device_printf(xdma->dev,
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"%s: Channel was not allocated properly.\n", __func__);
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return (-1);
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}
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if (xchan->flags & XCHAN_DESC_ALLOCATED) {
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device_printf(xdma->dev,
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"%s: Descriptors already allocated.\n", __func__);
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return (-1);
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}
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if ((xchan->flags & XCHAN_CONFIGURED) == 0) {
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device_printf(xdma->dev,
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"%s: Channel has no configuration.\n", __func__);
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return (-1);
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}
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conf = &xchan->conf;
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XCHAN_UNLOCK(xchan);
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ret = xdma_desc_alloc_bus_dma(xchan, desc_size, align);
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XCHAN_LOCK(xchan);
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if (ret != 0) {
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device_printf(xdma->dev,
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"%s: Can't allocate memory for descriptors.\n",
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__func__);
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return (-1);
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}
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xchan->flags |= XCHAN_DESC_ALLOCATED;
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/* We are going to write to descriptors. */
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bus_dmamap_sync(xchan->dma_tag, xchan->dma_map, BUS_DMASYNC_PREWRITE);
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return (0);
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}
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int
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xdma_desc_free(xdma_channel_t *xchan)
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{
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if ((xchan->flags & XCHAN_DESC_ALLOCATED) == 0) {
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/* No descriptors allocated. */
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return (-1);
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}
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bus_dmamap_unload(xchan->dma_tag, xchan->dma_map);
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bus_dmamem_free(xchan->dma_tag, xchan->descs, xchan->dma_map);
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bus_dma_tag_destroy(xchan->dma_tag);
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free(xchan->descs_phys, M_XDMA);
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xchan->flags &= ~(XCHAN_DESC_ALLOCATED);
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return (0);
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}
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int
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xdma_prep_memcpy(xdma_channel_t *xchan, uintptr_t src_addr,
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uintptr_t dst_addr, size_t len)
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{
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xdma_controller_t *xdma;
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xdma_config_t *conf;
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int ret;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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conf = &xchan->conf;
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conf->direction = XDMA_MEM_TO_MEM;
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conf->src_addr = src_addr;
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conf->dst_addr = dst_addr;
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conf->block_len = len;
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conf->block_num = 1;
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xchan->flags |= (XCHAN_CONFIGURED | XCHAN_TYPE_MEMCPY);
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XCHAN_LOCK(xchan);
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/* Deallocate old descriptors, if any. */
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xdma_desc_free(xchan);
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ret = XDMA_CHANNEL_PREP_MEMCPY(xdma->dma_dev, xchan);
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if (ret != 0) {
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device_printf(xdma->dev,
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"%s: Can't prepare memcpy transfer.\n", __func__);
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XCHAN_UNLOCK(xchan);
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return (-1);
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}
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if (xchan->flags & XCHAN_DESC_ALLOCATED) {
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/* Driver created xDMA descriptors. */
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bus_dmamap_sync(xchan->dma_tag, xchan->dma_map,
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BUS_DMASYNC_POSTWRITE);
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}
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XCHAN_UNLOCK(xchan);
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return (0);
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}
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int
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xdma_prep_cyclic(xdma_channel_t *xchan, enum xdma_direction dir,
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uintptr_t src_addr, uintptr_t dst_addr, int block_len,
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int block_num, int src_width, int dst_width)
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{
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xdma_controller_t *xdma;
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xdma_config_t *conf;
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int ret;
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xdma = xchan->xdma;
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KASSERT(xdma != NULL, ("xdma is NULL"));
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conf = &xchan->conf;
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conf->direction = dir;
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conf->src_addr = src_addr;
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conf->dst_addr = dst_addr;
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conf->block_len = block_len;
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conf->block_num = block_num;
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conf->src_width = src_width;
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conf->dst_width = dst_width;
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xchan->flags |= (XCHAN_CONFIGURED | XCHAN_TYPE_CYCLIC);
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XCHAN_LOCK(xchan);
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/* Deallocate old descriptors, if any. */
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xdma_desc_free(xchan);
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ret = XDMA_CHANNEL_PREP_CYCLIC(xdma->dma_dev, xchan);
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if (ret != 0) {
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device_printf(xdma->dev,
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"%s: Can't prepare cyclic transfer.\n", __func__);
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XCHAN_UNLOCK(xchan);
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return (-1);
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}
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if (xchan->flags & XCHAN_DESC_ALLOCATED) {
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/* Driver has created xDMA descriptors. */
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bus_dmamap_sync(xchan->dma_tag, xchan->dma_map,
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BUS_DMASYNC_POSTWRITE);
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}
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XCHAN_UNLOCK(xchan);
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return (0);
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}
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int
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xdma_begin(xdma_channel_t *xchan)
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{
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xdma_controller_t *xdma;
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int ret;
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xdma = xchan->xdma;
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ret = XDMA_CHANNEL_CONTROL(xdma->dma_dev, xchan, XDMA_CMD_BEGIN);
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if (ret != 0) {
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device_printf(xdma->dev,
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"%s: Can't begin the channel operation.\n", __func__);
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return (-1);
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}
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return (0);
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}
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int
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xdma_terminate(xdma_channel_t *xchan)
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{
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xdma_controller_t *xdma;
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int ret;
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xdma = xchan->xdma;
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ret = XDMA_CHANNEL_CONTROL(xdma->dma_dev, xchan, XDMA_CMD_TERMINATE);
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if (ret != 0) {
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device_printf(xdma->dev,
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"%s: Can't terminate the channel operation.\n", __func__);
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return (-1);
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}
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return (0);
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}
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int
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xdma_pause(xdma_channel_t *xchan)
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{
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xdma_controller_t *xdma;
|
|
int ret;
|
|
|
|
xdma = xchan->xdma;
|
|
|
|
ret = XDMA_CHANNEL_CONTROL(xdma->dma_dev, xchan, XDMA_CMD_PAUSE);
|
|
if (ret != 0) {
|
|
device_printf(xdma->dev,
|
|
"%s: Can't pause the channel operation.\n", __func__);
|
|
return (-1);
|
|
}
|
|
|
|
return (ret);
|
|
}
|
|
|
|
int
|
|
xdma_callback(xdma_channel_t *xchan)
|
|
{
|
|
struct xdma_intr_handler *ih_tmp;
|
|
struct xdma_intr_handler *ih;
|
|
|
|
TAILQ_FOREACH_SAFE(ih, &xchan->ie_handlers, ih_next, ih_tmp) {
|
|
if (ih->cb != NULL) {
|
|
ih->cb(ih->cb_user);
|
|
}
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
xdma_assert_locked(void)
|
|
{
|
|
|
|
XDMA_ASSERT_LOCKED();
|
|
}
|
|
|
|
#ifdef FDT
|
|
/*
|
|
* Notify the DMA driver we have machine-dependent data in FDT.
|
|
*/
|
|
static int
|
|
xdma_ofw_md_data(xdma_controller_t *xdma, pcell_t *cells, int ncells)
|
|
{
|
|
uint32_t ret;
|
|
|
|
ret = XDMA_OFW_MD_DATA(xdma->dma_dev, cells, ncells, (void **)&xdma->data);
|
|
|
|
return (ret);
|
|
}
|
|
|
|
/*
|
|
* Allocate xdma controller.
|
|
*/
|
|
xdma_controller_t *
|
|
xdma_ofw_get(device_t dev, const char *prop)
|
|
{
|
|
phandle_t node, parent;
|
|
xdma_controller_t *xdma;
|
|
device_t dma_dev;
|
|
pcell_t *cells;
|
|
int ncells;
|
|
int error;
|
|
int ndmas;
|
|
int idx;
|
|
|
|
node = ofw_bus_get_node(dev);
|
|
if (node <= 0) {
|
|
device_printf(dev,
|
|
"%s called on not ofw based device.\n", __func__);
|
|
}
|
|
|
|
error = ofw_bus_parse_xref_list_get_length(node,
|
|
"dmas", "#dma-cells", &ndmas);
|
|
if (error) {
|
|
device_printf(dev,
|
|
"%s can't get dmas list.\n", __func__);
|
|
return (NULL);
|
|
}
|
|
|
|
if (ndmas == 0) {
|
|
device_printf(dev,
|
|
"%s dmas list is empty.\n", __func__);
|
|
return (NULL);
|
|
}
|
|
|
|
error = ofw_bus_find_string_index(node, "dma-names", prop, &idx);
|
|
if (error != 0) {
|
|
device_printf(dev,
|
|
"%s can't find string index.\n", __func__);
|
|
return (NULL);
|
|
}
|
|
|
|
error = ofw_bus_parse_xref_list_alloc(node, "dmas", "#dma-cells",
|
|
idx, &parent, &ncells, &cells);
|
|
if (error != 0) {
|
|
device_printf(dev,
|
|
"%s can't get dma device xref.\n", __func__);
|
|
return (NULL);
|
|
}
|
|
|
|
dma_dev = OF_device_from_xref(parent);
|
|
if (dma_dev == NULL) {
|
|
device_printf(dev,
|
|
"%s can't get dma device.\n", __func__);
|
|
return (NULL);
|
|
}
|
|
|
|
xdma = malloc(sizeof(struct xdma_controller), M_XDMA, M_WAITOK | M_ZERO);
|
|
if (xdma == NULL) {
|
|
device_printf(dev,
|
|
"%s can't allocate memory for xdma.\n", __func__);
|
|
return (NULL);
|
|
}
|
|
xdma->dev = dev;
|
|
xdma->dma_dev = dma_dev;
|
|
|
|
TAILQ_INIT(&xdma->channels);
|
|
|
|
xdma_ofw_md_data(xdma, cells, ncells);
|
|
free(cells, M_OFWPROP);
|
|
|
|
return (xdma);
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Free xDMA controller object.
|
|
*/
|
|
int
|
|
xdma_put(xdma_controller_t *xdma)
|
|
{
|
|
|
|
XDMA_LOCK();
|
|
|
|
/* Ensure no channels allocated. */
|
|
if (!TAILQ_EMPTY(&xdma->channels)) {
|
|
device_printf(xdma->dev, "%s: Can't free xDMA\n", __func__);
|
|
return (-1);
|
|
}
|
|
|
|
free(xdma->data, M_DEVBUF);
|
|
free(xdma, M_XDMA);
|
|
|
|
XDMA_UNLOCK();
|
|
|
|
return (0);
|
|
}
|
|
|
|
static void
|
|
xdma_init(void)
|
|
{
|
|
|
|
mtx_init(&xdma_mtx, "xDMA", NULL, MTX_DEF);
|
|
}
|
|
|
|
SYSINIT(xdma, SI_SUB_DRIVERS, SI_ORDER_FIRST, xdma_init, NULL);
|