410 lines
11 KiB
C
410 lines
11 KiB
C
/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
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/*-
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* $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $
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*
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* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/ktr.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_extern.h>
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#include <machine/bus.h>
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#include <machine/cache.h>
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#include <mips/malta/gt_pci_bus_space.h>
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static bs_r_2_proto(gt_pci);
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static bs_r_4_proto(gt_pci);
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static bs_w_2_proto(gt_pci);
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static bs_w_4_proto(gt_pci);
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static bs_rm_2_proto(gt_pci);
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static bs_rm_4_proto(gt_pci);
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static bs_wm_2_proto(gt_pci);
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static bs_wm_4_proto(gt_pci);
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static bs_rr_2_proto(gt_pci);
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static bs_rr_4_proto(gt_pci);
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static bs_wr_2_proto(gt_pci);
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static bs_wr_4_proto(gt_pci);
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static bs_sm_2_proto(gt_pci);
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static bs_sm_4_proto(gt_pci);
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static bs_sr_2_proto(gt_pci);
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static bs_sr_4_proto(gt_pci);
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static struct bus_space gt_pci_space = {
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/* cookie */
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.bs_cookie = (void *) 0,
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/* mapping/unmapping */
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.bs_map = generic_bs_map,
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.bs_unmap = generic_bs_unmap,
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.bs_subregion = generic_bs_subregion,
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/* allocation/deallocation */
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.bs_alloc = generic_bs_alloc,
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.bs_free = generic_bs_free,
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/* barrier */
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.bs_barrier = generic_bs_barrier,
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/* read (single) */
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.bs_r_1 = generic_bs_r_1,
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.bs_r_2 = gt_pci_bs_r_2,
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.bs_r_4 = gt_pci_bs_r_4,
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.bs_r_8 = NULL,
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/* read multiple */
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.bs_rm_1 = generic_bs_rm_1,
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.bs_rm_2 = gt_pci_bs_rm_2,
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.bs_rm_4 = gt_pci_bs_rm_4,
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.bs_rm_8 = NULL,
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/* read region */
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.bs_rr_1 = generic_bs_rr_1,
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.bs_rr_2 = gt_pci_bs_rr_2,
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.bs_rr_4 = gt_pci_bs_rr_4,
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.bs_rr_8 = NULL,
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/* write (single) */
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.bs_w_1 = generic_bs_w_1,
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.bs_w_2 = gt_pci_bs_w_2,
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.bs_w_4 = gt_pci_bs_w_4,
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.bs_w_8 = NULL,
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/* write multiple */
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.bs_wm_1 = generic_bs_wm_1,
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.bs_wm_2 = gt_pci_bs_wm_2,
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.bs_wm_4 = gt_pci_bs_wm_4,
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.bs_wm_8 = NULL,
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/* write region */
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.bs_wr_1 = generic_bs_wr_1,
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.bs_wr_2 = gt_pci_bs_wr_2,
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.bs_wr_4 = gt_pci_bs_wr_4,
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.bs_wr_8 = NULL,
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/* set multiple */
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.bs_sm_1 = generic_bs_sm_1,
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.bs_sm_2 = gt_pci_bs_sm_2,
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.bs_sm_4 = gt_pci_bs_sm_4,
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.bs_sm_8 = NULL,
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/* set region */
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.bs_sr_1 = generic_bs_sr_1,
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.bs_sr_2 = gt_pci_bs_sr_2,
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.bs_sr_4 = gt_pci_bs_sr_4,
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.bs_sr_8 = NULL,
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/* copy */
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.bs_c_1 = generic_bs_c_1,
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.bs_c_2 = generic_bs_c_2,
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.bs_c_4 = generic_bs_c_4,
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.bs_c_8 = NULL,
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/* read (single) stream */
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.bs_r_1_s = generic_bs_r_1,
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.bs_r_2_s = generic_bs_r_2,
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.bs_r_4_s = generic_bs_r_4,
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.bs_r_8_s = NULL,
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/* read multiple stream */
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.bs_rm_1_s = generic_bs_rm_1,
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.bs_rm_2_s = generic_bs_rm_2,
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.bs_rm_4_s = generic_bs_rm_4,
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.bs_rm_8_s = NULL,
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/* read region stream */
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.bs_rr_1_s = generic_bs_rr_1,
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.bs_rr_2_s = generic_bs_rr_2,
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.bs_rr_4_s = generic_bs_rr_4,
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.bs_rr_8_s = NULL,
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/* write (single) stream */
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.bs_w_1_s = generic_bs_w_1,
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.bs_w_2_s = generic_bs_w_2,
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.bs_w_4_s = generic_bs_w_4,
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.bs_w_8_s = NULL,
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/* write multiple stream */
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.bs_wm_1_s = generic_bs_wm_1,
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.bs_wm_2_s = generic_bs_wm_2,
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.bs_wm_4_s = generic_bs_wm_4,
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.bs_wm_8_s = NULL,
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/* write region stream */
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.bs_wr_1_s = generic_bs_wr_1,
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.bs_wr_2_s = generic_bs_wr_2,
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.bs_wr_4_s = generic_bs_wr_4,
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.bs_wr_8_s = NULL,
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};
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#define rd16(a) le16toh(readw(a))
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#define rd32(a) le32toh(readl(a))
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#define wr16(a, v) writew(a, htole16(v))
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#define wr32(a, v) writel(a, htole32(v))
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/* generic bus_space tag */
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bus_space_tag_t gt_pci_bus_space = >_pci_space;
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uint16_t
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gt_pci_bs_r_2(void *t, bus_space_handle_t handle,
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bus_size_t offset)
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{
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return (rd16(handle + offset));
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}
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uint32_t
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gt_pci_bs_r_4(void *t, bus_space_handle_t handle,
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bus_size_t offset)
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{
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return (rd32(handle + offset));
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}
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void
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gt_pci_bs_rm_2(void *t, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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while (count--)
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*addr++ = rd16(baddr);
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}
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void
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gt_pci_bs_rm_4(void *t, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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while (count--)
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*addr++ = rd32(baddr);
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}
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/*
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* Read `count' 2 or 4 byte quantities from bus space
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* described by tag/handle and starting at `offset' and copy into
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* buffer provided.
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*/
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void
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gt_pci_bs_rr_2(void *t, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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while (count--) {
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*addr++ = rd16(baddr);
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baddr += 2;
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}
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}
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void
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gt_pci_bs_rr_4(void *t, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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while (count--) {
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*addr++ = rd32(baddr);
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baddr += 4;
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}
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}
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/*
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* Write the 2 or 4 byte value `value' to bus space
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* described by tag/handle/offset.
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*/
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void
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gt_pci_bs_w_2(void *t, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t value)
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{
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wr16(bsh + offset, value);
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}
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void
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gt_pci_bs_w_4(void *t, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t value)
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{
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wr32(bsh + offset, value);
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}
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/*
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* Write `count' 2 or 4 byte quantities from the buffer
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* provided to bus space described by tag/handle/offset.
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*/
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void
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gt_pci_bs_wm_2(void *t, bus_space_handle_t bsh,
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bus_size_t offset, const uint16_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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while (count--)
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wr16(baddr, *addr++);
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}
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void
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gt_pci_bs_wm_4(void *t, bus_space_handle_t bsh,
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bus_size_t offset, const uint32_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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while (count--)
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wr32(baddr, *addr++);
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}
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/*
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* Write `count' 2 or 4 byte quantities from the buffer provided
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* to bus space described by tag/handle starting at `offset'.
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*/
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void
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gt_pci_bs_wr_2(void *t, bus_space_handle_t bsh,
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bus_size_t offset, const uint16_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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while (count--) {
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wr16(baddr, *addr++);
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baddr += 2;
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}
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}
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void
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gt_pci_bs_wr_4(void *t, bus_space_handle_t bsh,
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bus_size_t offset, const uint32_t *addr, size_t count)
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{
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bus_addr_t baddr = bsh + offset;
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while (count--) {
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wr32(baddr, *addr++);
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baddr += 4;
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}
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}
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/*
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* Write the 2 or 4 byte value `val' to bus space described
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* by tag/handle/offset `count' times.
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*/
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void
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gt_pci_bs_sm_2(void *t, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t value, size_t count)
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{
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bus_addr_t addr = bsh + offset;
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while (count--)
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wr16(addr, value);
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}
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void
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gt_pci_bs_sm_4(void *t, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t value, size_t count)
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{
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bus_addr_t addr = bsh + offset;
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while (count--)
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wr32(addr, value);
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}
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/*
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* Write `count' 2 or 4 byte value `val' to bus space described
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* by tag/handle starting at `offset'.
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*/
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void
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gt_pci_bs_sr_2(void *t, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t value, size_t count)
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{
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bus_addr_t addr = bsh + offset;
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for (; count != 0; count--, addr += 2)
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wr16(addr, value);
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}
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void
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gt_pci_bs_sr_4(void *t, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t value, size_t count)
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{
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bus_addr_t addr = bsh + offset;
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for (; count != 0; count--, addr += 4)
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wr32(addr, value);
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}
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