408 lines
9.2 KiB
C
408 lines
9.2 KiB
C
/*-
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* Copyright (C) 2002 Benno Rice.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/intr_machdep.h>
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#include <machine/md_var.h>
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#include <machine/pio.h>
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#include <machine/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <sys/rman.h>
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#include <machine/openpicreg.h>
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#include <machine/openpicvar.h>
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#include "pic_if.h"
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/*
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* Local routines
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*/
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static u_int openpic_read(struct openpic_softc *, int);
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static void openpic_write(struct openpic_softc *, int, u_int);
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static int openpic_read_irq(struct openpic_softc *, int);
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static void openpic_eoi(struct openpic_softc *, int);
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static void openpic_enable_irq(struct openpic_softc *, int, int);
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static void openpic_disable_irq(struct openpic_softc *, int);
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static void openpic_set_priority(struct openpic_softc *, int, int);
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static void openpic_intr(void);
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static void openpic_ext_enable_irq(uintptr_t);
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static void openpic_ext_disable_irq(uintptr_t);
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/* XXX This limits us to one openpic */
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static struct openpic_softc *openpic_softc;
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/*
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* Called at nexus-probe time to allow interrupts to be enabled by
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* devices that are probed before the OpenPIC h/w is probed.
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*/
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int
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openpic_early_attach(device_t dev)
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{
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struct openpic_softc *sc;
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sc = device_get_softc(dev);
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openpic_softc = sc;
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sc->sc_rman.rm_type = RMAN_ARRAY;
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sc->sc_rman.rm_descr = device_get_nameunit(dev);
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if (rman_init(&sc->sc_rman) != 0 ||
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rman_manage_region(&sc->sc_rman, 0, OPENPIC_IRQMAX-1) != 0) {
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device_printf(dev, "could not set up resource management");
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return (ENXIO);
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}
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intr_init(openpic_intr, OPENPIC_IRQMAX, openpic_ext_enable_irq,
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openpic_ext_disable_irq);
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sc->sc_early_done = 1;
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return (0);
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}
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int
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openpic_attach(device_t dev)
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{
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struct openpic_softc *sc;
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u_int irq;
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u_int32_t x;
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sc = device_get_softc(dev);
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sc->sc_hwprobed = 1;
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if (!sc->sc_early_done)
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openpic_early_attach(dev);
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x = openpic_read(sc, OPENPIC_FEATURE);
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switch (x & OPENPIC_FEATURE_VERSION_MASK) {
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case 1:
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sc->sc_version = "1.0";
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break;
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case 2:
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sc->sc_version = "1.2";
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break;
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case 3:
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sc->sc_version = "1.3";
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break;
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default:
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sc->sc_version = "unknown";
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break;
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}
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sc->sc_ncpu = ((x & OPENPIC_FEATURE_LAST_CPU_MASK) >>
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OPENPIC_FEATURE_LAST_CPU_SHIFT) + 1;
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sc->sc_nirq = ((x & OPENPIC_FEATURE_LAST_IRQ_MASK) >>
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OPENPIC_FEATURE_LAST_IRQ_SHIFT) + 1;
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/*
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* PSIM seems to report 1 too many IRQs
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*/
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if (sc->sc_psim)
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sc->sc_nirq--;
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if (bootverbose)
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device_printf(dev,
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"Version %s, supports %d CPUs and %d irqs\n",
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sc->sc_version, sc->sc_ncpu, sc->sc_nirq);
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/* disable all interrupts */
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for (irq = 0; irq < sc->sc_nirq; irq++)
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openpic_write(sc, OPENPIC_SRC_VECTOR(irq), OPENPIC_IMASK);
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openpic_set_priority(sc, 0, 15);
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/* we don't need 8259 passthrough mode */
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x = openpic_read(sc, OPENPIC_CONFIG);
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x |= OPENPIC_CONFIG_8259_PASSTHRU_DISABLE;
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openpic_write(sc, OPENPIC_CONFIG, x);
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/* send all interrupts to cpu 0 */
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for (irq = 0; irq < sc->sc_nirq; irq++)
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openpic_write(sc, OPENPIC_IDEST(irq), 1 << 0);
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for (irq = 0; irq < sc->sc_nirq; irq++) {
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x = irq;
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x |= OPENPIC_IMASK;
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x |= OPENPIC_POLARITY_POSITIVE;
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x |= OPENPIC_SENSE_LEVEL;
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x |= 8 << OPENPIC_PRIORITY_SHIFT;
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openpic_write(sc, OPENPIC_SRC_VECTOR(irq), x);
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}
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/* XXX IPI */
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/* XXX set spurious intr vector */
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openpic_set_priority(sc, 0, 0);
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/* clear all pending interrupts */
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for (irq = 0; irq < sc->sc_nirq; irq++) {
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openpic_read_irq(sc, 0);
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openpic_eoi(sc, 0);
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}
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/* enable pre-h/w reserved irqs, disable all others */
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for (irq = 0; irq < sc->sc_nirq; irq++)
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if (sc->sc_irqrsv[irq])
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openpic_enable_irq(sc, irq, IST_LEVEL);
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else
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openpic_disable_irq(sc, irq);
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return (0);
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}
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/*
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* PIC interface
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*/
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struct resource *
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openpic_allocate_intr(device_t dev, device_t child, int *rid, u_long intr,
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u_int flags)
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{
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struct openpic_softc *sc;
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struct resource *rv;
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int needactivate;
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sc = device_get_softc(dev);
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needactivate = flags & RF_ACTIVE;
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flags &= ~RF_ACTIVE;
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if (sc->sc_hwprobed && (intr > sc->sc_nirq)) {
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device_printf(dev, "interrupt reservation %ld out of range\n",
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intr);
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return (NULL);
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}
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rv = rman_reserve_resource(&sc->sc_rman, intr, intr, 1, flags, child);
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if (rv == NULL) {
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device_printf(dev, "interrupt reservation failed for %s\n",
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device_get_nameunit(child));
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return (NULL);
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}
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if (needactivate) {
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if (bus_activate_resource(child, SYS_RES_IRQ, *rid, rv) != 0) {
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device_printf(dev,
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"resource activation failed for %s\n",
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device_get_nameunit(child));
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rman_release_resource(rv);
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return (NULL);
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}
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}
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return (rv);
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}
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int
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openpic_setup_intr(device_t dev, device_t child, struct resource *res,
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int flags, driver_intr_t *intr, void *arg, void **cookiep)
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{
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struct openpic_softc *sc;
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u_long start;
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int error;
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sc = device_get_softc(dev);
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start = rman_get_start(res);
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if (res == NULL) {
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device_printf(dev, "null interrupt resource from %s\n",
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device_get_nameunit(child));
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return (EINVAL);
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}
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if ((rman_get_flags(res) & RF_SHAREABLE) == 0)
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flags |= INTR_EXCL;
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/*
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* We depend here on rman_activate_resource() being idempotent.
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*/
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error = rman_activate_resource(res);
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if (error)
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return (error);
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error = inthand_add(device_get_nameunit(child), start, intr, arg,
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flags, cookiep);
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if (sc->sc_hwprobed)
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openpic_enable_irq(sc, start, IST_LEVEL);
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else
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sc->sc_irqrsv[start] = 1;
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return (error);
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}
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int
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openpic_teardown_intr(device_t dev, device_t child, struct resource *res,
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void *ih)
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{
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int error;
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error = rman_deactivate_resource(res);
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if (error)
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return (error);
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error = inthand_remove(rman_get_start(res), ih);
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return (error);
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}
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int
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openpic_release_intr(device_t dev, device_t child, int rid,
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struct resource *res)
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{
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int error;
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if (rman_get_flags(res) & RF_ACTIVE) {
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error = bus_deactivate_resource(child, SYS_RES_IRQ, rid, res);
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if (error)
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return (error);
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}
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return (rman_release_resource(res));
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}
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/*
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* Local routines
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*/
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static u_int
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openpic_read(struct openpic_softc *sc, int reg)
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{
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return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg));
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}
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static void
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openpic_write(struct openpic_softc *sc, int reg, u_int val)
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{
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bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
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}
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static int
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openpic_read_irq(struct openpic_softc *sc, int cpu)
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{
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return openpic_read(sc, OPENPIC_IACK(cpu)) & OPENPIC_VECTOR_MASK;
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}
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static void
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openpic_eoi(struct openpic_softc *sc, int cpu)
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{
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openpic_write(sc, OPENPIC_EOI(cpu), 0);
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}
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static void
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openpic_enable_irq(struct openpic_softc *sc, int irq, int type)
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{
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u_int x;
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x = openpic_read(sc, OPENPIC_SRC_VECTOR(irq));
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x &= ~(OPENPIC_IMASK | OPENPIC_SENSE_LEVEL | OPENPIC_SENSE_EDGE);
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if (type == IST_LEVEL)
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x |= OPENPIC_SENSE_LEVEL;
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else
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x |= OPENPIC_SENSE_EDGE;
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openpic_write(sc, OPENPIC_SRC_VECTOR(irq), x);
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}
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static void
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openpic_disable_irq(struct openpic_softc *sc, int irq)
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{
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u_int x;
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x = openpic_read(sc, OPENPIC_SRC_VECTOR(irq));
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x |= OPENPIC_IMASK;
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openpic_write(sc, OPENPIC_SRC_VECTOR(irq), x);
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}
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static void
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openpic_set_priority(struct openpic_softc *sc, int cpu, int pri)
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{
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u_int x;
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x = openpic_read(sc, OPENPIC_CPU_PRIORITY(cpu));
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x &= ~OPENPIC_CPU_PRIORITY_MASK;
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x |= pri;
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openpic_write(sc, OPENPIC_CPU_PRIORITY(cpu), x);
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}
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static void
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openpic_intr(void)
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{
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struct openpic_softc *sc;
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int irq;
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u_int32_t msr;
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sc = openpic_softc;
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msr = mfmsr();
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irq = openpic_read_irq(sc, 0);
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if (irq == 255) {
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return;
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}
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start:
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openpic_disable_irq(sc, irq);
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/*mtmsr(msr | PSL_EE);*/
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/* do the interrupt thang */
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intr_handle(irq);
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mtmsr(msr);
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openpic_eoi(sc, 0);
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irq = openpic_read_irq(sc, 0);
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if (irq != 255)
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goto start;
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}
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static void
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openpic_ext_enable_irq(uintptr_t irq)
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{
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if (!openpic_softc->sc_hwprobed)
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return;
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openpic_enable_irq(openpic_softc, irq, IST_LEVEL);
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}
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static void
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openpic_ext_disable_irq(uintptr_t irq)
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{
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if (!openpic_softc->sc_hwprobed)
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return;
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openpic_disable_irq(openpic_softc, irq);
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}
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