freebsd-skq/sys/arm64
Andrew Turner 4f33c38083 Add missing data barriers after storeing a new valid pagetable entry.
When moving from an invalid to a valid entry we don't need to invalidate
the tlb, however we do need to ensure the store is ordered before later
memory accesses. This is because this later access may be to a virtual
address within the newly mapped region.

Add the needed barriers to places where we don't later invalidate the
tlb. When we do invalidate the tlb there will be a barrier to correctly
order this.

This fixes a panic on boot on ThunderX2 when INVARIANTS is turned off:
panic: vm_fault_hold: fault on nofault entry, addr: 0xffff000040c11000

Reported by:	jchandra
Tested by:	jchandra
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D19097
2019-02-07 20:58:45 +00:00
..
acpica arm64 acpi: Add support for IORT table 2019-02-07 02:30:33 +00:00
arm64 Add missing data barriers after storeing a new valid pagetable entry. 2019-02-07 20:58:45 +00:00
cavium Rename the ThunderX CPU identification macros to include the X. This is the 2018-06-13 12:17:11 +00:00
cloudabi32 Port cloudabi32.ko to FreeBSD/arm64. 2017-11-30 17:58:48 +00:00
cloudabi64 Correct some more places where TO_PTR() should be used. 2017-11-26 14:53:56 +00:00
conf Enable COVERAGE and KCOV by default on arm64 and amd64. 2019-02-03 12:46:27 +00:00
coresight Fix one more OF_getprop_alloc instance missed in r332310 2018-04-08 23:17:51 +00:00
include Follow arm[32] and sparc64 KAPI and provide the FreeBSD standard spelling 2019-01-29 20:10:27 +00:00
linux Fix errno values returned from DUMMY_XATTR linuxulator calls 2019-01-11 07:58:25 +00:00
qualcomm Enable Qualcomm Debug Subsystem (QDSS) block on MSM8916 SoC. 2018-04-10 12:53:48 +00:00
rockchip arm64: rockchip: rk805: Add basic support for RK808 PMIC 2018-12-01 20:31:05 +00:00