2502dee0d1
In theory the barriers are required to cope with write combining and reordering. Two barriers are added (sometimes merged to one): 1. Before the first write to guarantee that previous writes to the region have been done 2. Before the last write to guarantee that write to the last dword/qword is done after previous writes Barriers are inserted before in the assumption that it is better to postpone barriers as much as it is possible (more chances that the operation has already been already done and barrier does not stall CPU). On x86 and amd64 bus space write barriers are just compiler memory barriers which are definitely required. Sponsored by: Solarflare Communications, Inc. Differential Revision: https://reviews.freebsd.org/D2077 |
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efsys.h | ||
efx_bootcfg.c | ||
efx_ev.c | ||
efx_filter.c | ||
efx_impl.h | ||
efx_intr.c | ||
efx_mac.c | ||
efx_mcdi.c | ||
efx_mcdi.h | ||
efx_mon.c | ||
efx_nic.c | ||
efx_nvram.c | ||
efx_phy.c | ||
efx_port.c | ||
efx_regs_ef10.h | ||
efx_regs_mcdi.h | ||
efx_regs_pci.h | ||
efx_regs.h | ||
efx_rx.c | ||
efx_sram.c | ||
efx_tx.c | ||
efx_types.h | ||
efx_vpd.c | ||
efx_wol.c | ||
efx.h | ||
siena_flash.h | ||
siena_impl.h | ||
siena_mac.c | ||
siena_mon.c | ||
siena_nic.c | ||
siena_nvram.c | ||
siena_phy.c | ||
siena_sram.c | ||
siena_vpd.c |