6f7c735300
The NAND Flash environment consists of several distinct components: - NAND framework (drivers harness for NAND controllers and NAND chips) - NAND simulator (NANDsim) - NAND file system (NAND FS) - Companion tools and utilities - Documentation (manual pages) This work is still experimental. Please use with caution. Obtained from: Semihalf Supported by: FreeBSD Foundation, Juniper Networks
833 lines
19 KiB
C
833 lines
19 KiB
C
/*-
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* Copyright (C) 2009-2012 Semihalf
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/callout.h>
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#include <sys/sysctl.h>
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#include <dev/nand/nand.h>
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#include <dev/nand/nandbus.h>
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#include <dev/nand/nand_ecc_pos.h>
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#include "nfc_if.h"
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#include "nand_if.h"
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#include "nandbus_if.h"
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#include <machine/stdarg.h>
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#define NAND_RESET_DELAY 1000 /* tRST */
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#define NAND_ERASE_DELAY 3000 /* tBERS */
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#define NAND_PROG_DELAY 700 /* tPROG */
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#define NAND_READ_DELAY 50 /* tR */
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#define BIT0(x) ((x) & 0x1)
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#define BIT1(x) (BIT0(x >> 1))
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#define BIT2(x) (BIT0(x >> 2))
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#define BIT3(x) (BIT0(x >> 3))
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#define BIT4(x) (BIT0(x >> 4))
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#define BIT5(x) (BIT0(x >> 5))
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#define BIT6(x) (BIT0(x >> 6))
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#define BIT7(x) (BIT0(x >> 7))
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#define SOFTECC_SIZE 256
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#define SOFTECC_BYTES 3
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int nand_debug_flag = 0;
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SYSCTL_INT(_debug, OID_AUTO, nand_debug, CTLFLAG_RW, &nand_debug_flag, 0,
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"NAND subsystem debug flag");
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static void
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nand_tunable_init(void *arg)
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{
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TUNABLE_INT_FETCH("debug.nand", &nand_debug_flag);
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}
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SYSINIT(nand_tunables, SI_SUB_VFS, SI_ORDER_ANY, nand_tunable_init, NULL);
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MALLOC_DEFINE(M_NAND, "NAND", "NAND dynamic data");
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static void calculate_ecc(const uint8_t *, uint8_t *);
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static int correct_ecc(uint8_t *, uint8_t *, uint8_t *);
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void
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nand_debug(int level, const char *fmt, ...)
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{
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va_list ap;
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if (!(nand_debug_flag & level))
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return;
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va_start(ap, fmt);
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vprintf(fmt, ap);
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va_end(ap);
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printf("\n");
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}
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void
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nand_init(struct nand_softc *nand, device_t dev, int ecc_mode,
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int ecc_bytes, int ecc_size, uint16_t *eccposition, char *cdev_name)
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{
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nand->ecc.eccmode = ecc_mode;
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nand->chip_cdev_name = cdev_name;
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if (ecc_mode == NAND_ECC_SOFT) {
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nand->ecc.eccbytes = SOFTECC_BYTES;
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nand->ecc.eccsize = SOFTECC_SIZE;
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} else if (ecc_mode != NAND_ECC_NONE) {
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nand->ecc.eccbytes = ecc_bytes;
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nand->ecc.eccsize = ecc_size;
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if (eccposition)
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nand->ecc.eccpositions = eccposition;
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}
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}
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void
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nand_onfi_set_params(struct nand_chip *chip, struct onfi_params *params)
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{
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struct chip_geom *cg;
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cg = &chip->chip_geom;
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init_chip_geom(cg, params->luns, params->blocks_per_lun,
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params->pages_per_block, params->bytes_per_page,
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params->spare_bytes_per_page);
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chip->t_bers = params->t_bers;
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chip->t_prog = params->t_prog;
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chip->t_r = params->t_r;
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chip->t_ccs = params->t_ccs;
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if (params->features & ONFI_FEAT_16BIT)
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chip->flags |= NAND_16_BIT;
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}
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void
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nand_set_params(struct nand_chip *chip, struct nand_params *params)
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{
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struct chip_geom *cg;
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uint32_t blocks_per_chip;
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cg = &chip->chip_geom;
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blocks_per_chip = (params->chip_size << 20) /
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(params->page_size * params->pages_per_block);
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init_chip_geom(cg, 1, blocks_per_chip,
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params->pages_per_block, params->page_size,
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params->oob_size);
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chip->t_bers = NAND_ERASE_DELAY;
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chip->t_prog = NAND_PROG_DELAY;
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chip->t_r = NAND_READ_DELAY;
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chip->t_ccs = 0;
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if (params->flags & NAND_16_BIT)
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chip->flags |= NAND_16_BIT;
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}
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int
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nand_init_stat(struct nand_chip *chip)
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{
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struct block_stat *blk_stat;
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struct page_stat *pg_stat;
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struct chip_geom *cg;
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uint32_t blks, pgs;
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cg = &chip->chip_geom;
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blks = cg->blks_per_lun * cg->luns;
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blk_stat = malloc(sizeof(struct block_stat) * blks, M_NAND,
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M_WAITOK | M_ZERO);
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if (!blk_stat)
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return (ENOMEM);
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pgs = blks * cg->pgs_per_blk;
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pg_stat = malloc(sizeof(struct page_stat) * pgs, M_NAND,
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M_WAITOK | M_ZERO);
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if (!pg_stat) {
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free(blk_stat, M_NAND);
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return (ENOMEM);
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}
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chip->blk_stat = blk_stat;
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chip->pg_stat = pg_stat;
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return (0);
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}
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void
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nand_destroy_stat(struct nand_chip *chip)
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{
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free(chip->pg_stat, M_NAND);
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free(chip->blk_stat, M_NAND);
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}
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int
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init_chip_geom(struct chip_geom *cg, uint32_t luns, uint32_t blks_per_lun,
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uint32_t pgs_per_blk, uint32_t pg_size, uint32_t oob_size)
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{
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int shift;
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if (!cg)
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return (-1);
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cg->luns = luns;
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cg->blks_per_lun = blks_per_lun;
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cg->blks_per_chip = blks_per_lun * luns;
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cg->pgs_per_blk = pgs_per_blk;
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cg->page_size = pg_size;
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cg->oob_size = oob_size;
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cg->block_size = cg->page_size * cg->pgs_per_blk;
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cg->chip_size = cg->block_size * cg->blks_per_chip;
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shift = fls(cg->pgs_per_blk - 1);
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cg->pg_mask = (1 << shift) - 1;
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cg->blk_shift = shift;
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if (cg->blks_per_lun > 0) {
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shift = fls(cg->blks_per_lun - 1);
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cg->blk_mask = ((1 << shift) - 1) << cg->blk_shift;
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} else {
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shift = 0;
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cg->blk_mask = 0;
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}
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cg->lun_shift = shift + cg->blk_shift;
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shift = fls(cg->luns - 1);
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cg->lun_mask = ((1 << shift) - 1) << cg->lun_shift;
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nand_debug(NDBG_NAND, "Masks: lun 0x%x blk 0x%x page 0x%x\n"
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"Shifts: lun %d blk %d",
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cg->lun_mask, cg->blk_mask, cg->pg_mask,
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cg->lun_shift, cg->blk_shift);
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return (0);
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}
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int
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nand_row_to_blkpg(struct chip_geom *cg, uint32_t row, uint32_t *lun,
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uint32_t *blk, uint32_t *pg)
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{
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if (!cg || !lun || !blk || !pg)
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return (-1);
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if (row & ~(cg->lun_mask | cg->blk_mask | cg->pg_mask)) {
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nand_debug(NDBG_NAND,"Address out of bounds\n");
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return (-1);
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}
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*lun = (row & cg->lun_mask) >> cg->lun_shift;
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*blk = (row & cg->blk_mask) >> cg->blk_shift;
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*pg = (row & cg->pg_mask);
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nand_debug(NDBG_NAND,"address %x-%x-%x\n", *lun, *blk, *pg);
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return (0);
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}
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int page_to_row(struct chip_geom *cg, uint32_t page, uint32_t *row)
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{
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uint32_t lun, block, pg_in_blk;
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if (!cg || !row)
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return (-1);
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block = page / cg->pgs_per_blk;
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pg_in_blk = page % cg->pgs_per_blk;
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lun = block / cg->blks_per_lun;
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block = block % cg->blks_per_lun;
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*row = (lun << cg->lun_shift) & cg->lun_mask;
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*row |= ((block << cg->blk_shift) & cg->blk_mask);
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*row |= (pg_in_blk & cg->pg_mask);
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return (0);
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}
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int
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nand_check_page_boundary(struct nand_chip *chip, uint32_t page)
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{
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struct chip_geom* cg;
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cg = &chip->chip_geom;
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if (page >= (cg->pgs_per_blk * cg->blks_per_lun * cg->luns)) {
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nand_debug(NDBG_GEN,"%s: page number too big %#x\n",
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__func__, page);
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return (1);
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}
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return (0);
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}
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void
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nand_get_chip_param(struct nand_chip *chip, struct chip_param_io *param)
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{
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struct chip_geom *cg;
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cg = &chip->chip_geom;
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param->page_size = cg->page_size;
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param->oob_size = cg->oob_size;
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param->blocks = cg->blks_per_lun * cg->luns;
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param->pages_per_block = cg->pgs_per_blk;
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}
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static uint16_t *
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default_software_ecc_positions(struct nand_chip *chip)
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{
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struct nand_ecc_data *eccd;
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eccd = &chip->nand->ecc;
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if (eccd->eccpositions)
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return (eccd->eccpositions);
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switch (chip->chip_geom.oob_size) {
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case 16:
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return ((uint16_t *)&default_software_ecc_positions_16);
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case 64:
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return ((uint16_t *)&default_software_ecc_positions_64);
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case 128:
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return ((uint16_t *)&default_software_ecc_positions_128);
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default:
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return (NULL); /* No ecc bytes positions defs available */
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}
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return (NULL);
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}
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static void
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calculate_ecc(const uint8_t *buf, uint8_t *ecc)
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{
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uint8_t p8, byte;
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int i;
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memset(ecc, 0, 3);
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for (i = 0; i < 256; i++) {
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byte = buf[i];
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ecc[0] ^= (BIT0(byte) ^ BIT2(byte) ^ BIT4(byte) ^
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BIT6(byte)) << 2;
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ecc[0] ^= (BIT1(byte) ^ BIT3(byte) ^ BIT5(byte) ^
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BIT7(byte)) << 3;
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ecc[0] ^= (BIT0(byte) ^ BIT1(byte) ^ BIT4(byte) ^
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BIT5(byte)) << 4;
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ecc[0] ^= (BIT2(byte) ^ BIT3(byte) ^ BIT6(byte) ^
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BIT7(byte)) << 5;
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ecc[0] ^= (BIT0(byte) ^ BIT1(byte) ^ BIT2(byte) ^
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BIT3(byte)) << 6;
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ecc[0] ^= (BIT4(byte) ^ BIT5(byte) ^ BIT6(byte) ^
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BIT7(byte)) << 7;
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p8 = BIT0(byte) ^ BIT1(byte) ^ BIT2(byte) ^
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BIT3(byte) ^ BIT4(byte) ^ BIT5(byte) ^ BIT6(byte) ^
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BIT7(byte);
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if (p8) {
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ecc[2] ^= (0x1 << BIT0(i));
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ecc[2] ^= (0x4 << BIT1(i));
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ecc[2] ^= (0x10 << BIT2(i));
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ecc[2] ^= (0x40 << BIT3(i));
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ecc[1] ^= (0x1 << BIT4(i));
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ecc[1] ^= (0x4 << BIT5(i));
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ecc[1] ^= (0x10 << BIT6(i));
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ecc[1] ^= (0x40 << BIT7(i));
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}
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}
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ecc[0] = ~ecc[0];
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ecc[1] = ~ecc[1];
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ecc[2] = ~ecc[2];
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ecc[0] |= 3;
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}
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static int
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correct_ecc(uint8_t *buf, uint8_t *calc_ecc, uint8_t *read_ecc)
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{
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uint8_t ecc0, ecc1, ecc2, onesnum, bit, byte;
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uint16_t addr = 0;
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ecc0 = calc_ecc[0] ^ read_ecc[0];
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ecc1 = calc_ecc[1] ^ read_ecc[1];
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ecc2 = calc_ecc[2] ^ read_ecc[2];
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if (!ecc0 && !ecc1 && !ecc2)
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return (ECC_OK);
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addr = BIT3(ecc0) | (BIT5(ecc0) << 1) | (BIT7(ecc0) << 2);
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addr |= (BIT1(ecc2) << 3) | (BIT3(ecc2) << 4) |
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(BIT5(ecc2) << 5) | (BIT7(ecc2) << 6);
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addr |= (BIT1(ecc1) << 7) | (BIT3(ecc1) << 8) |
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(BIT5(ecc1) << 9) | (BIT7(ecc1) << 10);
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onesnum = 0;
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while (ecc0 || ecc1 || ecc2) {
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if (ecc0 & 1)
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onesnum++;
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if (ecc1 & 1)
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onesnum++;
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if (ecc2 & 1)
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onesnum++;
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ecc0 >>= 1;
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ecc1 >>= 1;
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ecc2 >>= 1;
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}
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if (onesnum == 11) {
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/* Correctable error */
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bit = addr & 7;
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byte = addr >> 3;
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buf[byte] ^= (1 << bit);
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return (ECC_CORRECTABLE);
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} else if (onesnum == 1) {
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/* ECC error */
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return (ECC_ERROR_ECC);
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} else {
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/* Uncorrectable error */
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return (ECC_UNCORRECTABLE);
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}
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return (0);
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}
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int
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nand_softecc_get(device_t dev, uint8_t *buf, int pagesize, uint8_t *ecc)
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{
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int steps = pagesize / SOFTECC_SIZE;
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int i = 0, j = 0;
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for (; i < (steps * SOFTECC_BYTES);
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i += SOFTECC_BYTES, j += SOFTECC_SIZE) {
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calculate_ecc(&buf[j], &ecc[i]);
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}
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return (0);
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}
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int
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nand_softecc_correct(device_t dev, uint8_t *buf, int pagesize,
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uint8_t *readecc, uint8_t *calcecc)
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{
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int steps = pagesize / SOFTECC_SIZE;
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int i = 0, j = 0, ret = 0;
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for (i = 0; i < (steps * SOFTECC_BYTES);
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i += SOFTECC_BYTES, j += SOFTECC_SIZE) {
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ret += correct_ecc(&buf[j], &calcecc[i], &readecc[i]);
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if (ret < 0)
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return (ret);
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}
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return (ret);
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}
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static int
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offset_to_page(struct chip_geom *cg, uint32_t offset)
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{
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return (offset / cg->page_size);
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}
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int
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nand_read_pages(struct nand_chip *chip, uint32_t offset, void *buf,
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uint32_t len)
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{
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struct chip_geom *cg;
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struct nand_ecc_data *eccd;
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struct page_stat *pg_stat;
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device_t nandbus;
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void *oob = NULL;
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uint8_t *ptr;
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uint16_t *eccpos = NULL;
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uint32_t page, num, steps = 0;
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int i, retval = 0, needwrite;
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nand_debug(NDBG_NAND,"%p read page %x[%x]", chip, offset, len);
|
|
cg = &chip->chip_geom;
|
|
eccd = &chip->nand->ecc;
|
|
page = offset_to_page(cg, offset);
|
|
num = len / cg->page_size;
|
|
|
|
if (eccd->eccmode != NAND_ECC_NONE) {
|
|
steps = cg->page_size / eccd->eccsize;
|
|
eccpos = default_software_ecc_positions(chip);
|
|
oob = malloc(cg->oob_size, M_NAND, M_WAITOK);
|
|
}
|
|
|
|
nandbus = device_get_parent(chip->dev);
|
|
NANDBUS_LOCK(nandbus);
|
|
NANDBUS_SELECT_CS(device_get_parent(chip->dev), chip->num);
|
|
|
|
ptr = (uint8_t *)buf;
|
|
while (num--) {
|
|
pg_stat = &(chip->pg_stat[page]);
|
|
|
|
if (NAND_READ_PAGE(chip->dev, page, ptr, cg->page_size, 0)) {
|
|
retval = ENXIO;
|
|
break;
|
|
}
|
|
|
|
if (eccd->eccmode != NAND_ECC_NONE) {
|
|
if (NAND_GET_ECC(chip->dev, ptr, eccd->ecccalculated,
|
|
&needwrite)) {
|
|
retval = ENXIO;
|
|
break;
|
|
}
|
|
nand_debug(NDBG_ECC,"%s: ECC calculated:",
|
|
__func__);
|
|
if (nand_debug_flag & NDBG_ECC)
|
|
for (i = 0; i < (eccd->eccbytes * steps); i++)
|
|
printf("%x ", eccd->ecccalculated[i]);
|
|
|
|
nand_debug(NDBG_ECC,"\n");
|
|
|
|
if (NAND_READ_OOB(chip->dev, page, oob, cg->oob_size,
|
|
0)) {
|
|
retval = ENXIO;
|
|
break;
|
|
}
|
|
for (i = 0; i < (eccd->eccbytes * steps); i++)
|
|
eccd->eccread[i] = ((uint8_t *)oob)[eccpos[i]];
|
|
|
|
nand_debug(NDBG_ECC,"%s: ECC read:", __func__);
|
|
if (nand_debug_flag & NDBG_ECC)
|
|
for (i = 0; i < (eccd->eccbytes * steps); i++)
|
|
printf("%x ", eccd->eccread[i]);
|
|
nand_debug(NDBG_ECC,"\n");
|
|
|
|
retval = NAND_CORRECT_ECC(chip->dev, ptr, eccd->eccread,
|
|
eccd->ecccalculated);
|
|
|
|
nand_debug(NDBG_ECC, "NAND_CORRECT_ECC() returned %d",
|
|
retval);
|
|
|
|
if (retval == 0)
|
|
pg_stat->ecc_stat.ecc_succeded++;
|
|
else if (retval > 0) {
|
|
pg_stat->ecc_stat.ecc_corrected += retval;
|
|
retval = ECC_CORRECTABLE;
|
|
} else {
|
|
pg_stat->ecc_stat.ecc_failed++;
|
|
break;
|
|
}
|
|
}
|
|
|
|
pg_stat->page_read++;
|
|
page++;
|
|
ptr += cg->page_size;
|
|
}
|
|
|
|
NANDBUS_UNLOCK(nandbus);
|
|
|
|
if (oob)
|
|
free(oob, M_NAND);
|
|
|
|
return (retval);
|
|
}
|
|
|
|
int
|
|
nand_read_pages_raw(struct nand_chip *chip, uint32_t offset, void *buf,
|
|
uint32_t len)
|
|
{
|
|
struct chip_geom *cg;
|
|
device_t nandbus;
|
|
uint8_t *ptr;
|
|
uint32_t page, num, end, begin = 0, begin_off;
|
|
int retval = 0;
|
|
|
|
cg = &chip->chip_geom;
|
|
page = offset_to_page(cg, offset);
|
|
begin_off = offset - page * cg->page_size;
|
|
if (begin_off) {
|
|
begin = cg->page_size - begin_off;
|
|
len -= begin;
|
|
}
|
|
num = len / cg->page_size;
|
|
end = len % cg->page_size;
|
|
|
|
nandbus = device_get_parent(chip->dev);
|
|
NANDBUS_LOCK(nandbus);
|
|
NANDBUS_SELECT_CS(device_get_parent(chip->dev), chip->num);
|
|
|
|
ptr = (uint8_t *)buf;
|
|
if (begin_off) {
|
|
if (NAND_READ_PAGE(chip->dev, page, ptr, begin, begin_off)) {
|
|
NANDBUS_UNLOCK(nandbus);
|
|
return (ENXIO);
|
|
}
|
|
|
|
page++;
|
|
ptr += begin;
|
|
}
|
|
|
|
while (num--) {
|
|
if (NAND_READ_PAGE(chip->dev, page, ptr, cg->page_size, 0)) {
|
|
NANDBUS_UNLOCK(nandbus);
|
|
return (ENXIO);
|
|
}
|
|
|
|
page++;
|
|
ptr += cg->page_size;
|
|
}
|
|
|
|
if (end)
|
|
if (NAND_READ_PAGE(chip->dev, page, ptr, end, 0)) {
|
|
NANDBUS_UNLOCK(nandbus);
|
|
return (ENXIO);
|
|
}
|
|
|
|
NANDBUS_UNLOCK(nandbus);
|
|
|
|
return (retval);
|
|
}
|
|
|
|
|
|
int
|
|
nand_prog_pages(struct nand_chip *chip, uint32_t offset, uint8_t *buf,
|
|
uint32_t len)
|
|
{
|
|
struct chip_geom *cg;
|
|
struct page_stat *pg_stat;
|
|
struct nand_ecc_data *eccd;
|
|
device_t nandbus;
|
|
uint32_t page, num;
|
|
uint8_t *oob = NULL;
|
|
uint16_t *eccpos = NULL;
|
|
int steps = 0, i, needwrite, err = 0;
|
|
|
|
nand_debug(NDBG_NAND,"%p prog page %x[%x]", chip, offset, len);
|
|
|
|
eccd = &chip->nand->ecc;
|
|
cg = &chip->chip_geom;
|
|
page = offset_to_page(cg, offset);
|
|
num = len / cg->page_size;
|
|
|
|
if (eccd->eccmode != NAND_ECC_NONE) {
|
|
steps = cg->page_size / eccd->eccsize;
|
|
oob = malloc(cg->oob_size, M_NAND, M_WAITOK);
|
|
eccpos = default_software_ecc_positions(chip);
|
|
}
|
|
|
|
nandbus = device_get_parent(chip->dev);
|
|
NANDBUS_LOCK(nandbus);
|
|
NANDBUS_SELECT_CS(device_get_parent(chip->dev), chip->num);
|
|
|
|
while (num--) {
|
|
if (NAND_PROGRAM_PAGE(chip->dev, page, buf, cg->page_size, 0)) {
|
|
err = ENXIO;
|
|
break;
|
|
}
|
|
|
|
if (eccd->eccmode != NAND_ECC_NONE) {
|
|
if (NAND_GET_ECC(chip->dev, buf, &eccd->ecccalculated,
|
|
&needwrite)) {
|
|
err = ENXIO;
|
|
break;
|
|
}
|
|
nand_debug(NDBG_ECC,"ECC calculated:");
|
|
if (nand_debug_flag & NDBG_ECC)
|
|
for (i = 0; i < (eccd->eccbytes * steps); i++)
|
|
printf("%x ", eccd->ecccalculated[i]);
|
|
|
|
nand_debug(NDBG_ECC,"\n");
|
|
|
|
if (needwrite) {
|
|
if (NAND_READ_OOB(chip->dev, page, oob, cg->oob_size,
|
|
0)) {
|
|
err = ENXIO;
|
|
break;
|
|
}
|
|
|
|
for (i = 0; i < (eccd->eccbytes * steps); i++)
|
|
oob[eccpos[i]] = eccd->ecccalculated[i];
|
|
|
|
if (NAND_PROGRAM_OOB(chip->dev, page, oob,
|
|
cg->oob_size, 0)) {
|
|
err = ENXIO;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
pg_stat = &(chip->pg_stat[page]);
|
|
pg_stat->page_written++;
|
|
|
|
page++;
|
|
buf += cg->page_size;
|
|
}
|
|
|
|
NANDBUS_UNLOCK(nandbus);
|
|
|
|
if (oob)
|
|
free(oob, M_NAND);
|
|
|
|
return (err);
|
|
}
|
|
|
|
int
|
|
nand_prog_pages_raw(struct nand_chip *chip, uint32_t offset, void *buf,
|
|
uint32_t len)
|
|
{
|
|
struct chip_geom *cg;
|
|
device_t nandbus;
|
|
uint8_t *ptr;
|
|
uint32_t page, num, end, begin = 0, begin_off;
|
|
int retval = 0;
|
|
|
|
cg = &chip->chip_geom;
|
|
page = offset_to_page(cg, offset);
|
|
begin_off = offset - page * cg->page_size;
|
|
if (begin_off) {
|
|
begin = cg->page_size - begin_off;
|
|
len -= begin;
|
|
}
|
|
num = len / cg->page_size;
|
|
end = len % cg->page_size;
|
|
|
|
nandbus = device_get_parent(chip->dev);
|
|
NANDBUS_LOCK(nandbus);
|
|
NANDBUS_SELECT_CS(device_get_parent(chip->dev), chip->num);
|
|
|
|
ptr = (uint8_t *)buf;
|
|
if (begin_off) {
|
|
if (NAND_PROGRAM_PAGE(chip->dev, page, ptr, begin, begin_off)) {
|
|
NANDBUS_UNLOCK(nandbus);
|
|
return (ENXIO);
|
|
}
|
|
|
|
page++;
|
|
ptr += begin;
|
|
}
|
|
|
|
while (num--) {
|
|
if (NAND_PROGRAM_PAGE(chip->dev, page, ptr, cg->page_size, 0)) {
|
|
NANDBUS_UNLOCK(nandbus);
|
|
return (ENXIO);
|
|
}
|
|
|
|
page++;
|
|
ptr += cg->page_size;
|
|
}
|
|
|
|
if (end)
|
|
retval = NAND_PROGRAM_PAGE(chip->dev, page, ptr, end, 0);
|
|
|
|
NANDBUS_UNLOCK(nandbus);
|
|
|
|
return (retval);
|
|
}
|
|
|
|
int
|
|
nand_read_oob(struct nand_chip *chip, uint32_t page, void *buf,
|
|
uint32_t len)
|
|
{
|
|
device_t nandbus;
|
|
int retval = 0;
|
|
|
|
nandbus = device_get_parent(chip->dev);
|
|
NANDBUS_LOCK(nandbus);
|
|
NANDBUS_SELECT_CS(device_get_parent(chip->dev), chip->num);
|
|
|
|
retval = NAND_READ_OOB(chip->dev, page, buf, len, 0);
|
|
|
|
NANDBUS_UNLOCK(nandbus);
|
|
|
|
return (retval);
|
|
}
|
|
|
|
|
|
int
|
|
nand_prog_oob(struct nand_chip *chip, uint32_t page, void *buf,
|
|
uint32_t len)
|
|
{
|
|
device_t nandbus;
|
|
int retval = 0;
|
|
|
|
nandbus = device_get_parent(chip->dev);
|
|
NANDBUS_LOCK(nandbus);
|
|
NANDBUS_SELECT_CS(device_get_parent(chip->dev), chip->num);
|
|
|
|
retval = NAND_PROGRAM_OOB(chip->dev, page, buf, len, 0);
|
|
|
|
NANDBUS_UNLOCK(nandbus);
|
|
|
|
return (retval);
|
|
}
|
|
|
|
int
|
|
nand_erase_blocks(struct nand_chip *chip, off_t offset, size_t len)
|
|
{
|
|
device_t nandbus;
|
|
struct chip_geom *cg;
|
|
uint32_t block, num_blocks;
|
|
int err = 0;
|
|
|
|
cg = &chip->chip_geom;
|
|
if ((offset % cg->block_size) || (len % cg->block_size))
|
|
return (EINVAL);
|
|
|
|
block = offset / cg->block_size;
|
|
num_blocks = len / cg->block_size;
|
|
nand_debug(NDBG_NAND,"%p erase blocks %d[%d]", chip, block, num_blocks);
|
|
|
|
nandbus = device_get_parent(chip->dev);
|
|
NANDBUS_LOCK(nandbus);
|
|
NANDBUS_SELECT_CS(device_get_parent(chip->dev), chip->num);
|
|
|
|
while (num_blocks--) {
|
|
if (!nand_check_bad_block(chip, block)) {
|
|
if (NAND_ERASE_BLOCK(chip->dev, block)) {
|
|
nand_debug(NDBG_NAND,"%p erase blocks %d error",
|
|
chip, block);
|
|
nand_mark_bad_block(chip, block);
|
|
err = ENXIO;
|
|
}
|
|
} else
|
|
err = ENXIO;
|
|
|
|
block++;
|
|
};
|
|
|
|
NANDBUS_UNLOCK(nandbus);
|
|
|
|
if (err)
|
|
nand_update_bbt(chip);
|
|
|
|
return (err);
|
|
}
|