jkim 6da60ac39e Set negative quality to TSC timecounter when C3 state is enabled for Intel ...

processors unless the invariant TSC bit of CPUID is set.  Intel processors
may stop incrementing TSC when DPSLP# pin is asserted, according to Intel
processor manuals, i. e., TSC timecounter is useless if the processor can
enter deep sleep state (C3/C4).  This problem was accidentally uncovered by
r222869, which increased timecounter quality of P-state invariant TSC, e.g.,
for Core2 Duo T5870 (Family 6, Model f) and Atom N270 (Family 6, Model 1c).

Reported by:	Fabian Keil (freebsd-listen at fabiankeil dot de)
		Ian FREISLICH (ianf at clue dot co dot za)
Tested by:	Fabian Keil (freebsd-listen at fabiankeil dot de)
		- Core2 Duo T5870 (C3 state available/enabled)
		jkim - Xeon X5150 (C3 state unavailable)

2011-06-22 16:40:45 +00:00

..

busdma_machdep.c

Revert to using bus_size_t for the bounce_zone's alignment member.

2011-01-13 00:52:57 +00:00

dump_machdep.c

Add the watchdogs patting during the (shutdown time) disk syncing and

2011-04-28 16:02:05 +00:00

io_apic.c

Drop the icu_lock spinlock while pausing briefly after masking the

2010-12-23 15:17:28 +00:00

local_apic.c

MFC

2011-05-06 22:45:33 +00:00

mca.c

Use a dedicated taskqueue with a thread that runs at a software-interrupt

2011-02-03 13:09:22 +00:00

mptable_pci.c

MFC

2011-05-03 18:57:46 +00:00

mptable.c

Move the mptable.h under x86/include/.

2010-11-09 20:28:09 +00:00

msi.c

Move <machine/apicreg.h> to <x86/apicreg.h>.

2010-11-01 18:18:46 +00:00

nexus.c

Add implementations of BUS_ADJUST_RESOURCE() to the PCI bus driver,

2011-05-02 14:13:12 +00:00

tsc.c

Set negative quality to TSC timecounter when C3 state is enabled for Intel

2011-06-22 16:40:45 +00:00