9da7bdde06
The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts. Special thanks to Wind River for providing access to "The Duke of Highlander" tool: an older (2014) run over FreeBSD tree was useful as a starting point. Initially, only tag files that use BSD 4-Clause "Original" license. RelNotes: yes Differential Revision: https://reviews.freebsd.org/D13133
162 lines
5.7 KiB
C
162 lines
5.7 KiB
C
/*-
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* SPDX-License-Identifier: BSD-4-Clause
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*
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* Copyright (c) 2002 David E. O'Brien. All rights reserved.
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)param.h 8.1 (Berkeley) 6/10/93
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* $FreeBSD$
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*/
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#ifndef _AMD64_INCLUDE_PARAM_H_
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#define _AMD64_INCLUDE_PARAM_H_
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#include <machine/_align.h>
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/*
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* Machine dependent constants for AMD64.
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*/
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#define __HAVE_ACPI
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#define __PCI_REROUTE_INTERRUPT
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#ifndef MACHINE
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#define MACHINE "amd64"
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#endif
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#ifndef MACHINE_ARCH
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#define MACHINE_ARCH "amd64"
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#endif
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#ifndef MACHINE_ARCH32
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#define MACHINE_ARCH32 "i386"
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#endif
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#if defined(SMP) || defined(KLD_MODULE)
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#ifndef MAXCPU
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#define MAXCPU 256
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#endif
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#else
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#define MAXCPU 1
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#endif
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#ifndef MAXMEMDOM
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#define MAXMEMDOM 8
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#endif
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#define ALIGNBYTES _ALIGNBYTES
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#define ALIGN(p) _ALIGN(p)
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/*
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* ALIGNED_POINTER is a boolean macro that checks whether an address
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* is valid to fetch data elements of type t from on this architecture.
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* This does not reflect the optimal alignment, just the possibility
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* (within reasonable limits).
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*/
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#define ALIGNED_POINTER(p, t) 1
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/*
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* CACHE_LINE_SIZE is the compile-time maximum cache line size for an
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* architecture. It should be used with appropriate caution.
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*/
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#define CACHE_LINE_SHIFT 6
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#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
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/* Size of the level 1 page table units */
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#define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t)))
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#define NPTEPGSHIFT 9 /* LOG2(NPTEPG) */
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#define PAGE_SHIFT 12 /* LOG2(PAGE_SIZE) */
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#define PAGE_SIZE (1<<PAGE_SHIFT) /* bytes/page */
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#define PAGE_MASK (PAGE_SIZE-1)
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/* Size of the level 2 page directory units */
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#define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
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#define NPDEPGSHIFT 9 /* LOG2(NPDEPG) */
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#define PDRSHIFT 21 /* LOG2(NBPDR) */
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#define NBPDR (1<<PDRSHIFT) /* bytes/page dir */
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#define PDRMASK (NBPDR-1)
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/* Size of the level 3 page directory pointer table units */
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#define NPDPEPG (PAGE_SIZE/(sizeof (pdp_entry_t)))
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#define NPDPEPGSHIFT 9 /* LOG2(NPDPEPG) */
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#define PDPSHIFT 30 /* LOG2(NBPDP) */
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#define NBPDP (1<<PDPSHIFT) /* bytes/page dir ptr table */
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#define PDPMASK (NBPDP-1)
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/* Size of the level 4 page-map level-4 table units */
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#define NPML4EPG (PAGE_SIZE/(sizeof (pml4_entry_t)))
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#define NPML4EPGSHIFT 9 /* LOG2(NPML4EPG) */
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#define PML4SHIFT 39 /* LOG2(NBPML4) */
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#define NBPML4 (1UL<<PML4SHIFT)/* bytes/page map lev4 table */
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#define PML4MASK (NBPML4-1)
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#define MAXPAGESIZES 3 /* maximum number of supported page sizes */
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#define IOPAGES 2 /* pages of i/o permission bitmap */
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/*
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* I/O permission bitmap has a bit for each I/O port plus an additional
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* byte at the end with all bits set. See section "I/O Permission Bit Map"
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* in the Intel SDM for more details.
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*/
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#define IOPERM_BITMAP_SIZE (IOPAGES * PAGE_SIZE + 1)
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#ifndef KSTACK_PAGES
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#define KSTACK_PAGES 4 /* pages of kstack (with pcb) */
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#endif
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#define KSTACK_GUARD_PAGES 1 /* pages of kstack guard; 0 disables */
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/*
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* Mach derived conversion macros
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*/
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#define round_page(x) ((((unsigned long)(x)) + PAGE_MASK) & ~(PAGE_MASK))
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#define trunc_page(x) ((unsigned long)(x) & ~(PAGE_MASK))
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#define trunc_2mpage(x) ((unsigned long)(x) & ~PDRMASK)
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#define round_2mpage(x) ((((unsigned long)(x)) + PDRMASK) & ~PDRMASK)
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#define trunc_1gpage(x) ((unsigned long)(x) & ~PDPMASK)
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#define atop(x) ((unsigned long)(x) >> PAGE_SHIFT)
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#define ptoa(x) ((unsigned long)(x) << PAGE_SHIFT)
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#define amd64_btop(x) ((unsigned long)(x) >> PAGE_SHIFT)
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#define amd64_ptob(x) ((unsigned long)(x) << PAGE_SHIFT)
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#define pgtok(x) ((unsigned long)(x) * (PAGE_SIZE / 1024))
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#define INKERNEL(va) (((va) >= DMAP_MIN_ADDRESS && (va) < DMAP_MAX_ADDRESS) \
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|| ((va) >= VM_MIN_KERNEL_ADDRESS && (va) < VM_MAX_KERNEL_ADDRESS))
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#ifdef SMP
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#define SC_TABLESIZE 1024 /* Must be power of 2. */
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#endif
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#endif /* !_AMD64_INCLUDE_PARAM_H_ */
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