1225 lines
32 KiB
C
1225 lines
32 KiB
C
/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
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/*-
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* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* $FreeBSD$ */
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#ifndef _AMD64_BUS_AMD64_H_
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#define _AMD64_BUS_AMD64_H_
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#include <machine/cpufunc.h>
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/*
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* To remain compatible with NetBSD's interface, default to both memio and
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* pio when neither of them is defined.
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*/
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#if !defined(_AMD64_BUS_PIO_H_) && !defined(_AMD64_BUS_MEMIO_H_)
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#define _AMD64_BUS_PIO_H_
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#define _AMD64_BUS_MEMIO_H_
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#endif
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/*
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* Values for the amd64 bus space tag, not to be used directly by MI code.
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*/
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#define AMD64_BUS_SPACE_IO 0 /* space is i/o space */
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#define AMD64_BUS_SPACE_MEM 1 /* space is mem space */
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/*
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* Bus address and size types
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*/
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typedef uint64_t bus_addr_t;
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typedef uint64_t bus_size_t;
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#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
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#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
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#define BUS_SPACE_MAXSIZE 0xFFFFFFFF
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#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
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#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
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#define BUS_SPACE_MAXADDR 0xFFFFFFFFFFFFFFFFULL
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#define BUS_SPACE_UNRESTRICTED (~0)
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/*
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* Access methods for bus resources and address space.
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*/
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typedef uint64_t bus_space_tag_t;
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typedef uint64_t bus_space_handle_t;
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/*
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* Map a region of device bus space into CPU virtual address space.
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*/
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static __inline int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
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bus_size_t size, int flags,
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bus_space_handle_t *bshp);
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static __inline int
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bus_space_map(bus_space_tag_t t __unused, bus_addr_t addr,
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bus_size_t size __unused, int flags __unused,
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bus_space_handle_t *bshp)
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{
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*bshp = addr;
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return (0);
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}
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/*
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* Unmap a region of device bus space.
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*/
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static __inline void bus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t size);
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static __inline void
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bus_space_unmap(bus_space_tag_t t __unused, bus_space_handle_t bsh __unused,
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bus_size_t size __unused)
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{
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}
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/*
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* Get a new handle for a subregion of an already-mapped area of bus space.
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*/
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static __inline int bus_space_subregion(bus_space_tag_t t,
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bus_space_handle_t bsh,
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bus_size_t offset, bus_size_t size,
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bus_space_handle_t *nbshp);
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static __inline int
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bus_space_subregion(bus_space_tag_t t __unused, bus_space_handle_t bsh,
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bus_size_t offset, bus_size_t size __unused,
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bus_space_handle_t *nbshp)
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{
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*nbshp = bsh + offset;
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return (0);
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}
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/*
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* Allocate a region of memory that is accessible to devices in bus space.
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*/
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int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart,
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bus_addr_t rend, bus_size_t size, bus_size_t align,
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bus_size_t boundary, int flags, bus_addr_t *addrp,
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bus_space_handle_t *bshp);
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/*
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* Free a region of bus space accessible memory.
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*/
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static __inline void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t size);
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static __inline void
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bus_space_free(bus_space_tag_t t __unused, bus_space_handle_t bsh __unused,
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bus_size_t size __unused)
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{
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}
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#if defined(_AMD64_BUS_PIO_H_) || defined(_AMD64_BUS_MEMIO_H_)
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/*
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* Read a 1, 2, 4, or 8 byte quantity from bus space
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* described by tag/handle/offset.
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*/
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static __inline u_int8_t bus_space_read_1(bus_space_tag_t tag,
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bus_space_handle_t handle,
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bus_size_t offset);
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static __inline u_int16_t bus_space_read_2(bus_space_tag_t tag,
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bus_space_handle_t handle,
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bus_size_t offset);
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static __inline u_int32_t bus_space_read_4(bus_space_tag_t tag,
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bus_space_handle_t handle,
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bus_size_t offset);
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static __inline u_int8_t
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bus_space_read_1(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset)
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{
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#if defined (_AMD64_BUS_PIO_H_)
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#if defined (_AMD64_BUS_MEMIO_H_)
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if (tag == AMD64_BUS_SPACE_IO)
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#endif
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return (inb(handle + offset));
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#endif
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#if defined (_AMD64_BUS_MEMIO_H_)
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return (*(volatile u_int8_t *)(handle + offset));
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#endif
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}
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static __inline u_int16_t
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bus_space_read_2(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset)
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{
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#if defined(_AMD64_BUS_PIO_H_)
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#if defined(_AMD64_BUS_MEMIO_H_)
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if (tag == AMD64_BUS_SPACE_IO)
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#endif
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return (inw(handle + offset));
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#endif
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#if defined(_AMD64_BUS_MEMIO_H_)
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return (*(volatile u_int16_t *)(handle + offset));
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#endif
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}
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static __inline u_int32_t
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bus_space_read_4(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset)
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{
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#if defined(_AMD64_BUS_PIO_H_)
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#if defined(_AMD64_BUS_MEMIO_H_)
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if (tag == AMD64_BUS_SPACE_IO)
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#endif
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return (inl(handle + offset));
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#endif
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#if defined(_AMD64_BUS_MEMIO_H_)
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return (*(volatile u_int32_t *)(handle + offset));
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#endif
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}
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#if 0 /* Cause a link error for bus_space_read_8 */
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#define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
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#endif
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/*
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* Read `count' 1, 2, 4, or 8 byte quantities from bus space
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* described by tag/handle/offset and copy into buffer provided.
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*/
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static __inline void bus_space_read_multi_1(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int8_t *addr,
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size_t count);
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static __inline void bus_space_read_multi_2(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int16_t *addr,
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size_t count);
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static __inline void bus_space_read_multi_4(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t *addr,
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size_t count);
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static __inline void
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bus_space_read_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int8_t *addr, size_t count)
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{
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#if defined(_AMD64_BUS_PIO_H_)
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#if defined(_AMD64_BUS_MEMIO_H_)
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if (tag == AMD64_BUS_SPACE_IO)
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#endif
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insb(bsh + offset, addr, count);
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#endif
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#if defined(_AMD64_BUS_MEMIO_H_)
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#if defined(_AMD64_BUS_PIO_H_)
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else
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#endif
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{
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#ifdef __GNUC__
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__asm __volatile(" \n\
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cld \n\
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1: movb (%2),%%al \n\
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stosb \n\
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loop 1b" :
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"=D" (addr), "=c" (count) :
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"r" (bsh + offset), "0" (addr), "1" (count) :
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"%eax", "memory");
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#endif
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}
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#endif
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}
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static __inline void
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bus_space_read_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int16_t *addr, size_t count)
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{
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#if defined(_AMD64_BUS_PIO_H_)
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#if defined(_AMD64_BUS_MEMIO_H_)
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if (tag == AMD64_BUS_SPACE_IO)
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#endif
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insw(bsh + offset, addr, count);
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#endif
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#if defined(_AMD64_BUS_MEMIO_H_)
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#if defined(_AMD64_BUS_PIO_H_)
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else
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#endif
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{
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#ifdef __GNUC__
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__asm __volatile(" \n\
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cld \n\
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1: movw (%2),%%ax \n\
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stosw \n\
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loop 1b" :
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"=D" (addr), "=c" (count) :
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"r" (bsh + offset), "0" (addr), "1" (count) :
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"%eax", "memory");
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#endif
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}
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#endif
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}
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static __inline void
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bus_space_read_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t *addr, size_t count)
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{
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#if defined(_AMD64_BUS_PIO_H_)
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#if defined(_AMD64_BUS_MEMIO_H_)
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if (tag == AMD64_BUS_SPACE_IO)
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#endif
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insl(bsh + offset, addr, count);
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#endif
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#if defined(_AMD64_BUS_MEMIO_H_)
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#if defined(_AMD64_BUS_PIO_H_)
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else
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#endif
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{
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#ifdef __GNUC__
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__asm __volatile(" \n\
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cld \n\
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1: movl (%2),%%eax \n\
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stosl \n\
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loop 1b" :
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"=D" (addr), "=c" (count) :
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"r" (bsh + offset), "0" (addr), "1" (count) :
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"%eax", "memory");
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#endif
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}
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#endif
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}
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#if 0 /* Cause a link error for bus_space_read_multi_8 */
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#define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
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#endif
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/*
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* Read `count' 1, 2, 4, or 8 byte quantities from bus space
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* described by tag/handle and starting at `offset' and copy into
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* buffer provided.
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*/
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static __inline void bus_space_read_region_1(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int8_t *addr,
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size_t count);
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static __inline void bus_space_read_region_2(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int16_t *addr,
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size_t count);
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static __inline void bus_space_read_region_4(bus_space_tag_t tag,
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bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t *addr,
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size_t count);
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static __inline void
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bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int8_t *addr, size_t count)
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{
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#if defined(_AMD64_BUS_PIO_H_)
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#if defined(_AMD64_BUS_MEMIO_H_)
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if (tag == AMD64_BUS_SPACE_IO)
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#endif
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{
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int _port_ = bsh + offset;
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#ifdef __GNUC__
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__asm __volatile(" \n\
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cld \n\
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1: inb %w2,%%al \n\
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stosb \n\
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incl %2 \n\
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loop 1b" :
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"=D" (addr), "=c" (count), "=d" (_port_) :
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"0" (addr), "1" (count), "2" (_port_) :
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"%eax", "memory", "cc");
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#endif
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}
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#endif
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#if defined(_AMD64_BUS_MEMIO_H_)
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#if defined(_AMD64_BUS_PIO_H_)
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else
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#endif
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{
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bus_space_handle_t _port_ = bsh + offset;
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#ifdef __GNUC__
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__asm __volatile(" \n\
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cld \n\
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repne \n\
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movsb" :
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"=D" (addr), "=c" (count), "=S" (_port_) :
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"0" (addr), "1" (count), "2" (_port_) :
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"memory", "cc");
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#endif
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}
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#endif
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}
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static __inline void
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bus_space_read_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int16_t *addr, size_t count)
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{
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#if defined(_AMD64_BUS_PIO_H_)
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#if defined(_AMD64_BUS_MEMIO_H_)
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if (tag == AMD64_BUS_SPACE_IO)
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#endif
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{
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int _port_ = bsh + offset;
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#ifdef __GNUC__
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__asm __volatile(" \n\
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cld \n\
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1: inw %w2,%%ax \n\
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stosw \n\
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addl $2,%2 \n\
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loop 1b" :
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"=D" (addr), "=c" (count), "=d" (_port_) :
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"0" (addr), "1" (count), "2" (_port_) :
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"%eax", "memory", "cc");
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#endif
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}
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#endif
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#if defined(_AMD64_BUS_MEMIO_H_)
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#if defined(_AMD64_BUS_PIO_H_)
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else
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#endif
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{
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bus_space_handle_t _port_ = bsh + offset;
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#ifdef __GNUC__
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__asm __volatile(" \n\
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cld \n\
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repne \n\
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movsw" :
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"=D" (addr), "=c" (count), "=S" (_port_) :
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"0" (addr), "1" (count), "2" (_port_) :
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"memory", "cc");
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#endif
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}
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#endif
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}
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static __inline void
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bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t *addr, size_t count)
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{
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#if defined(_AMD64_BUS_PIO_H_)
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|
#if defined(_AMD64_BUS_MEMIO_H_)
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|
if (tag == AMD64_BUS_SPACE_IO)
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#endif
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{
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int _port_ = bsh + offset;
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#ifdef __GNUC__
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|
__asm __volatile(" \n\
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|
cld \n\
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|
1: inl %w2,%%eax \n\
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|
stosl \n\
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|
addl $4,%2 \n\
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|
loop 1b" :
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"=D" (addr), "=c" (count), "=d" (_port_) :
|
|
"0" (addr), "1" (count), "2" (_port_) :
|
|
"%eax", "memory", "cc");
|
|
#endif
|
|
}
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
{
|
|
bus_space_handle_t _port_ = bsh + offset;
|
|
#ifdef __GNUC__
|
|
__asm __volatile(" \n\
|
|
cld \n\
|
|
repne \n\
|
|
movsl" :
|
|
"=D" (addr), "=c" (count), "=S" (_port_) :
|
|
"0" (addr), "1" (count), "2" (_port_) :
|
|
"memory", "cc");
|
|
#endif
|
|
}
|
|
#endif
|
|
}
|
|
|
|
#if 0 /* Cause a link error for bus_space_read_region_8 */
|
|
#define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
|
|
#endif
|
|
|
|
/*
|
|
* Write the 1, 2, 4, or 8 byte value `value' to bus space
|
|
* described by tag/handle/offset.
|
|
*/
|
|
|
|
static __inline void bus_space_write_1(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int8_t value);
|
|
|
|
static __inline void bus_space_write_2(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int16_t value);
|
|
|
|
static __inline void bus_space_write_4(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int32_t value);
|
|
|
|
static __inline void
|
|
bus_space_write_1(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int8_t value)
|
|
{
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
outb(bsh + offset, value);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
*(volatile u_int8_t *)(bsh + offset) = value;
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_write_2(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int16_t value)
|
|
{
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
outw(bsh + offset, value);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
*(volatile u_int16_t *)(bsh + offset) = value;
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_write_4(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int32_t value)
|
|
{
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
outl(bsh + offset, value);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
*(volatile u_int32_t *)(bsh + offset) = value;
|
|
#endif
|
|
}
|
|
|
|
#if 0 /* Cause a link error for bus_space_write_8 */
|
|
#define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
|
|
#endif
|
|
|
|
/*
|
|
* Write `count' 1, 2, 4, or 8 byte quantities from the buffer
|
|
* provided to bus space described by tag/handle/offset.
|
|
*/
|
|
|
|
static __inline void bus_space_write_multi_1(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
const u_int8_t *addr,
|
|
size_t count);
|
|
static __inline void bus_space_write_multi_2(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
const u_int16_t *addr,
|
|
size_t count);
|
|
|
|
static __inline void bus_space_write_multi_4(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
const u_int32_t *addr,
|
|
size_t count);
|
|
|
|
static __inline void
|
|
bus_space_write_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, const u_int8_t *addr, size_t count)
|
|
{
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
outsb(bsh + offset, addr, count);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
{
|
|
#ifdef __GNUC__
|
|
__asm __volatile(" \n\
|
|
cld \n\
|
|
1: lodsb \n\
|
|
movb %%al,(%2) \n\
|
|
loop 1b" :
|
|
"=S" (addr), "=c" (count) :
|
|
"r" (bsh + offset), "0" (addr), "1" (count) :
|
|
"%eax", "memory", "cc");
|
|
#endif
|
|
}
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_write_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, const u_int16_t *addr, size_t count)
|
|
{
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
outsw(bsh + offset, addr, count);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
{
|
|
#ifdef __GNUC__
|
|
__asm __volatile(" \n\
|
|
cld \n\
|
|
1: lodsw \n\
|
|
movw %%ax,(%2) \n\
|
|
loop 1b" :
|
|
"=S" (addr), "=c" (count) :
|
|
"r" (bsh + offset), "0" (addr), "1" (count) :
|
|
"%eax", "memory", "cc");
|
|
#endif
|
|
}
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_write_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, const u_int32_t *addr, size_t count)
|
|
{
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
outsl(bsh + offset, addr, count);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
{
|
|
#ifdef __GNUC__
|
|
__asm __volatile(" \n\
|
|
cld \n\
|
|
1: lodsl \n\
|
|
movl %%eax,(%2) \n\
|
|
loop 1b" :
|
|
"=S" (addr), "=c" (count) :
|
|
"r" (bsh + offset), "0" (addr), "1" (count) :
|
|
"%eax", "memory", "cc");
|
|
#endif
|
|
}
|
|
#endif
|
|
}
|
|
|
|
#if 0 /* Cause a link error for bus_space_write_multi_8 */
|
|
#define bus_space_write_multi_8(t, h, o, a, c) \
|
|
!!! bus_space_write_multi_8 unimplemented !!!
|
|
#endif
|
|
|
|
/*
|
|
* Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
|
|
* to bus space described by tag/handle starting at `offset'.
|
|
*/
|
|
|
|
static __inline void bus_space_write_region_1(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
const u_int8_t *addr,
|
|
size_t count);
|
|
static __inline void bus_space_write_region_2(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
const u_int16_t *addr,
|
|
size_t count);
|
|
static __inline void bus_space_write_region_4(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
const u_int32_t *addr,
|
|
size_t count);
|
|
|
|
static __inline void
|
|
bus_space_write_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, const u_int8_t *addr, size_t count)
|
|
{
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
{
|
|
int _port_ = bsh + offset;
|
|
#ifdef __GNUC__
|
|
__asm __volatile(" \n\
|
|
cld \n\
|
|
1: lodsb \n\
|
|
outb %%al,%w0 \n\
|
|
incl %0 \n\
|
|
loop 1b" :
|
|
"=d" (_port_), "=S" (addr), "=c" (count) :
|
|
"0" (_port_), "1" (addr), "2" (count) :
|
|
"%eax", "memory", "cc");
|
|
#endif
|
|
}
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
{
|
|
bus_space_handle_t _port_ = bsh + offset;
|
|
#ifdef __GNUC__
|
|
__asm __volatile(" \n\
|
|
cld \n\
|
|
repne \n\
|
|
movsb" :
|
|
"=D" (_port_), "=S" (addr), "=c" (count) :
|
|
"0" (_port_), "1" (addr), "2" (count) :
|
|
"memory", "cc");
|
|
#endif
|
|
}
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_write_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, const u_int16_t *addr, size_t count)
|
|
{
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
{
|
|
int _port_ = bsh + offset;
|
|
#ifdef __GNUC__
|
|
__asm __volatile(" \n\
|
|
cld \n\
|
|
1: lodsw \n\
|
|
outw %%ax,%w0 \n\
|
|
addl $2,%0 \n\
|
|
loop 1b" :
|
|
"=d" (_port_), "=S" (addr), "=c" (count) :
|
|
"0" (_port_), "1" (addr), "2" (count) :
|
|
"%eax", "memory", "cc");
|
|
#endif
|
|
}
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
{
|
|
bus_space_handle_t _port_ = bsh + offset;
|
|
#ifdef __GNUC__
|
|
__asm __volatile(" \n\
|
|
cld \n\
|
|
repne \n\
|
|
movsw" :
|
|
"=D" (_port_), "=S" (addr), "=c" (count) :
|
|
"0" (_port_), "1" (addr), "2" (count) :
|
|
"memory", "cc");
|
|
#endif
|
|
}
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_write_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, const u_int32_t *addr, size_t count)
|
|
{
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
{
|
|
int _port_ = bsh + offset;
|
|
#ifdef __GNUC__
|
|
__asm __volatile(" \n\
|
|
cld \n\
|
|
1: lodsl \n\
|
|
outl %%eax,%w0 \n\
|
|
addl $4,%0 \n\
|
|
loop 1b" :
|
|
"=d" (_port_), "=S" (addr), "=c" (count) :
|
|
"0" (_port_), "1" (addr), "2" (count) :
|
|
"%eax", "memory", "cc");
|
|
#endif
|
|
}
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
{
|
|
bus_space_handle_t _port_ = bsh + offset;
|
|
#ifdef __GNUC__
|
|
__asm __volatile(" \n\
|
|
cld \n\
|
|
repne \n\
|
|
movsl" :
|
|
"=D" (_port_), "=S" (addr), "=c" (count) :
|
|
"0" (_port_), "1" (addr), "2" (count) :
|
|
"memory", "cc");
|
|
#endif
|
|
}
|
|
#endif
|
|
}
|
|
|
|
#if 0 /* Cause a link error for bus_space_write_region_8 */
|
|
#define bus_space_write_region_8 \
|
|
!!! bus_space_write_region_8 unimplemented !!!
|
|
#endif
|
|
|
|
/*
|
|
* Write the 1, 2, 4, or 8 byte value `val' to bus space described
|
|
* by tag/handle/offset `count' times.
|
|
*/
|
|
|
|
static __inline void bus_space_set_multi_1(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
u_int8_t value, size_t count);
|
|
static __inline void bus_space_set_multi_2(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
u_int16_t value, size_t count);
|
|
static __inline void bus_space_set_multi_4(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset,
|
|
u_int32_t value, size_t count);
|
|
|
|
static __inline void
|
|
bus_space_set_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int8_t value, size_t count)
|
|
{
|
|
bus_space_handle_t addr = bsh + offset;
|
|
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
while (count--)
|
|
outb(addr, value);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
while (count--)
|
|
*(volatile u_int8_t *)(addr) = value;
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_set_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int16_t value, size_t count)
|
|
{
|
|
bus_space_handle_t addr = bsh + offset;
|
|
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
while (count--)
|
|
outw(addr, value);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
while (count--)
|
|
*(volatile u_int16_t *)(addr) = value;
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_set_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int32_t value, size_t count)
|
|
{
|
|
bus_space_handle_t addr = bsh + offset;
|
|
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
while (count--)
|
|
outl(addr, value);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
while (count--)
|
|
*(volatile u_int32_t *)(addr) = value;
|
|
#endif
|
|
}
|
|
|
|
#if 0 /* Cause a link error for bus_space_set_multi_8 */
|
|
#define bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!!
|
|
#endif
|
|
|
|
/*
|
|
* Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
|
|
* by tag/handle starting at `offset'.
|
|
*/
|
|
|
|
static __inline void bus_space_set_region_1(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int8_t value,
|
|
size_t count);
|
|
static __inline void bus_space_set_region_2(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int16_t value,
|
|
size_t count);
|
|
static __inline void bus_space_set_region_4(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int32_t value,
|
|
size_t count);
|
|
|
|
static __inline void
|
|
bus_space_set_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int8_t value, size_t count)
|
|
{
|
|
bus_space_handle_t addr = bsh + offset;
|
|
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
for (; count != 0; count--, addr++)
|
|
outb(addr, value);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
for (; count != 0; count--, addr++)
|
|
*(volatile u_int8_t *)(addr) = value;
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_set_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int16_t value, size_t count)
|
|
{
|
|
bus_space_handle_t addr = bsh + offset;
|
|
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
for (; count != 0; count--, addr += 2)
|
|
outw(addr, value);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
for (; count != 0; count--, addr += 2)
|
|
*(volatile u_int16_t *)(addr) = value;
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_set_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, u_int32_t value, size_t count)
|
|
{
|
|
bus_space_handle_t addr = bsh + offset;
|
|
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
for (; count != 0; count--, addr += 4)
|
|
outl(addr, value);
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
for (; count != 0; count--, addr += 4)
|
|
*(volatile u_int32_t *)(addr) = value;
|
|
#endif
|
|
}
|
|
|
|
#if 0 /* Cause a link error for bus_space_set_region_8 */
|
|
#define bus_space_set_region_8 !!! bus_space_set_region_8 unimplemented !!!
|
|
#endif
|
|
|
|
/*
|
|
* Copy `count' 1, 2, 4, or 8 byte values from bus space starting
|
|
* at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
|
|
*/
|
|
|
|
static __inline void bus_space_copy_region_1(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh1,
|
|
bus_size_t off1,
|
|
bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count);
|
|
|
|
static __inline void bus_space_copy_region_2(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh1,
|
|
bus_size_t off1,
|
|
bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count);
|
|
|
|
static __inline void bus_space_copy_region_4(bus_space_tag_t tag,
|
|
bus_space_handle_t bsh1,
|
|
bus_size_t off1,
|
|
bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count);
|
|
|
|
static __inline void
|
|
bus_space_copy_region_1(bus_space_tag_t tag, bus_space_handle_t bsh1,
|
|
bus_size_t off1, bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count)
|
|
{
|
|
bus_space_handle_t addr1 = bsh1 + off1;
|
|
bus_space_handle_t addr2 = bsh2 + off2;
|
|
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
{
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1++, addr2++)
|
|
outb(addr2, inb(addr1));
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += (count - 1), addr2 += (count - 1);
|
|
count != 0; count--, addr1--, addr2--)
|
|
outb(addr2, inb(addr1));
|
|
}
|
|
}
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
{
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1++, addr2++)
|
|
*(volatile u_int8_t *)(addr2) =
|
|
*(volatile u_int8_t *)(addr1);
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += (count - 1), addr2 += (count - 1);
|
|
count != 0; count--, addr1--, addr2--)
|
|
*(volatile u_int8_t *)(addr2) =
|
|
*(volatile u_int8_t *)(addr1);
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_copy_region_2(bus_space_tag_t tag, bus_space_handle_t bsh1,
|
|
bus_size_t off1, bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count)
|
|
{
|
|
bus_space_handle_t addr1 = bsh1 + off1;
|
|
bus_space_handle_t addr2 = bsh2 + off2;
|
|
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
{
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1 += 2, addr2 += 2)
|
|
outw(addr2, inw(addr1));
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1);
|
|
count != 0; count--, addr1 -= 2, addr2 -= 2)
|
|
outw(addr2, inw(addr1));
|
|
}
|
|
}
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
{
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1 += 2, addr2 += 2)
|
|
*(volatile u_int16_t *)(addr2) =
|
|
*(volatile u_int16_t *)(addr1);
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1);
|
|
count != 0; count--, addr1 -= 2, addr2 -= 2)
|
|
*(volatile u_int16_t *)(addr2) =
|
|
*(volatile u_int16_t *)(addr1);
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
static __inline void
|
|
bus_space_copy_region_4(bus_space_tag_t tag, bus_space_handle_t bsh1,
|
|
bus_size_t off1, bus_space_handle_t bsh2,
|
|
bus_size_t off2, size_t count)
|
|
{
|
|
bus_space_handle_t addr1 = bsh1 + off1;
|
|
bus_space_handle_t addr2 = bsh2 + off2;
|
|
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
if (tag == AMD64_BUS_SPACE_IO)
|
|
#endif
|
|
{
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1 += 4, addr2 += 4)
|
|
outl(addr2, inl(addr1));
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1);
|
|
count != 0; count--, addr1 -= 4, addr2 -= 4)
|
|
outl(addr2, inl(addr1));
|
|
}
|
|
}
|
|
#endif
|
|
#if defined(_AMD64_BUS_MEMIO_H_)
|
|
#if defined(_AMD64_BUS_PIO_H_)
|
|
else
|
|
#endif
|
|
{
|
|
if (addr1 >= addr2) {
|
|
/* src after dest: copy forward */
|
|
for (; count != 0; count--, addr1 += 4, addr2 += 4)
|
|
*(volatile u_int32_t *)(addr2) =
|
|
*(volatile u_int32_t *)(addr1);
|
|
} else {
|
|
/* dest after src: copy backwards */
|
|
for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1);
|
|
count != 0; count--, addr1 -= 4, addr2 -= 4)
|
|
*(volatile u_int32_t *)(addr2) =
|
|
*(volatile u_int32_t *)(addr1);
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
#endif /* defined(_AMD64_BUS_PIO_H_) || defined(_AMD64_MEM_IO_H_) */
|
|
|
|
#if 0 /* Cause a link error for bus_space_copy_8 */
|
|
#define bus_space_copy_region_8 !!! bus_space_copy_region_8 unimplemented !!!
|
|
#endif
|
|
|
|
/*
|
|
* Bus read/write barrier methods.
|
|
*
|
|
* void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
* bus_size_t offset, bus_size_t len, int flags);
|
|
*
|
|
*
|
|
* Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than
|
|
* prevent reordering by the compiler; all Intel x86 processors currently
|
|
* retire operations outside the CPU in program order.
|
|
*/
|
|
#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
|
|
#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
|
|
|
|
static __inline void
|
|
bus_space_barrier(bus_space_tag_t tag __unused, bus_space_handle_t bsh __unused,
|
|
bus_size_t offset __unused, bus_size_t len __unused, int flags)
|
|
{
|
|
#ifdef __GNUC__
|
|
if (flags & BUS_SPACE_BARRIER_READ)
|
|
__asm __volatile("lock; addl $0,0(%%rsp)" : : : "memory");
|
|
else
|
|
__asm __volatile("" : : : "memory");
|
|
#endif
|
|
}
|
|
|
|
#endif /* _AMD64_BUS_AMD64_H_ */
|