2a6e8faff6
CPU core, only pair of them. As result, both cores are running on highest one of requested frequencies, and that is reported by status register. Such behavior confuses frequency validation logic, as it runs on only one core, as SMP is not yet launched, making EIST completely unusable. To workaround this, add check for validation result. If we haven't found at least two usable frequencies, then probably we are looking bad and have to trust data provided by BIOS as-is. |
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| .. | ||
| est.c | ||
| hwpstate.c | ||
| p4tcc.c | ||
| powernow.c | ||
| smist.c | ||