8a68ae80f6
Expose the special kernel LAPIC, IOAPIC, and HPET devices to userspace for use in, e.g., fallback instruction emulation (when userspace has a newer instruction decode/emulation layer than the kernel vmm(4)). Plumb the ioctl through libvmmapi and register the memory ranges in bhyve(8). Reviewed by: grehan Differential Revision: https://reviews.freebsd.org/D24525
1664 lines
35 KiB
C
1664 lines
35 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/sysctl.h>
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#include <sys/ioctl.h>
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#include <sys/linker.h>
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#include <sys/mman.h>
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#include <sys/module.h>
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#include <sys/_iovec.h>
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#include <sys/cpuset.h>
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#include <x86/segments.h>
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#include <machine/specialreg.h>
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#include <errno.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <assert.h>
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#include <string.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <libutil.h>
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#include <vm/vm.h>
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#include <machine/vmm.h>
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#include <machine/vmm_dev.h>
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#include <machine/vmm_snapshot.h>
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#include "vmmapi.h"
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#define MB (1024 * 1024UL)
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#define GB (1024 * 1024 * 1024UL)
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/*
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* Size of the guard region before and after the virtual address space
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* mapping the guest physical memory. This must be a multiple of the
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* superpage size for performance reasons.
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*/
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#define VM_MMAP_GUARD_SIZE (4 * MB)
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#define PROT_RW (PROT_READ | PROT_WRITE)
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#define PROT_ALL (PROT_READ | PROT_WRITE | PROT_EXEC)
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struct vmctx {
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int fd;
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uint32_t lowmem_limit;
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int memflags;
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size_t lowmem;
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size_t highmem;
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char *baseaddr;
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char *name;
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};
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#define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x)))
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#define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x)))
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static int
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vm_device_open(const char *name)
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{
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int fd, len;
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char *vmfile;
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len = strlen("/dev/vmm/") + strlen(name) + 1;
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vmfile = malloc(len);
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assert(vmfile != NULL);
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snprintf(vmfile, len, "/dev/vmm/%s", name);
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/* Open the device file */
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fd = open(vmfile, O_RDWR, 0);
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free(vmfile);
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return (fd);
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}
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int
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vm_create(const char *name)
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{
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/* Try to load vmm(4) module before creating a guest. */
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if (modfind("vmm") < 0)
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kldload("vmm");
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return (CREATE((char *)name));
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}
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struct vmctx *
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vm_open(const char *name)
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{
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struct vmctx *vm;
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vm = malloc(sizeof(struct vmctx) + strlen(name) + 1);
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assert(vm != NULL);
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vm->fd = -1;
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vm->memflags = 0;
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vm->lowmem_limit = 3 * GB;
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vm->name = (char *)(vm + 1);
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strcpy(vm->name, name);
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if ((vm->fd = vm_device_open(vm->name)) < 0)
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goto err;
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return (vm);
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err:
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vm_destroy(vm);
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return (NULL);
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}
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void
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vm_destroy(struct vmctx *vm)
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{
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assert(vm != NULL);
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if (vm->fd >= 0)
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close(vm->fd);
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DESTROY(vm->name);
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free(vm);
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}
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int
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vm_parse_memsize(const char *optarg, size_t *ret_memsize)
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{
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char *endptr;
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size_t optval;
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int error;
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optval = strtoul(optarg, &endptr, 0);
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if (*optarg != '\0' && *endptr == '\0') {
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/*
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* For the sake of backward compatibility if the memory size
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* specified on the command line is less than a megabyte then
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* it is interpreted as being in units of MB.
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*/
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if (optval < MB)
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optval *= MB;
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*ret_memsize = optval;
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error = 0;
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} else
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error = expand_number(optarg, ret_memsize);
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return (error);
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}
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uint32_t
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vm_get_lowmem_limit(struct vmctx *ctx)
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{
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return (ctx->lowmem_limit);
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}
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void
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vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit)
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{
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ctx->lowmem_limit = limit;
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}
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void
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vm_set_memflags(struct vmctx *ctx, int flags)
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{
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ctx->memflags = flags;
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}
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int
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vm_get_memflags(struct vmctx *ctx)
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{
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return (ctx->memflags);
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}
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/*
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* Map segment 'segid' starting at 'off' into guest address range [gpa,gpa+len).
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*/
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int
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vm_mmap_memseg(struct vmctx *ctx, vm_paddr_t gpa, int segid, vm_ooffset_t off,
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size_t len, int prot)
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{
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struct vm_memmap memmap;
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int error, flags;
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memmap.gpa = gpa;
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memmap.segid = segid;
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memmap.segoff = off;
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memmap.len = len;
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memmap.prot = prot;
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memmap.flags = 0;
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if (ctx->memflags & VM_MEM_F_WIRED)
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memmap.flags |= VM_MEMMAP_F_WIRED;
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/*
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* If this mapping already exists then don't create it again. This
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* is the common case for SYSMEM mappings created by bhyveload(8).
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*/
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error = vm_mmap_getnext(ctx, &gpa, &segid, &off, &len, &prot, &flags);
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if (error == 0 && gpa == memmap.gpa) {
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if (segid != memmap.segid || off != memmap.segoff ||
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prot != memmap.prot || flags != memmap.flags) {
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errno = EEXIST;
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return (-1);
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} else {
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return (0);
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}
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}
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error = ioctl(ctx->fd, VM_MMAP_MEMSEG, &memmap);
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return (error);
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}
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int
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vm_get_guestmem_from_ctx(struct vmctx *ctx, char **guest_baseaddr,
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size_t *lowmem_size, size_t *highmem_size)
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{
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*guest_baseaddr = ctx->baseaddr;
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*lowmem_size = ctx->lowmem;
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*highmem_size = ctx->highmem;
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return (0);
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}
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int
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vm_mmap_getnext(struct vmctx *ctx, vm_paddr_t *gpa, int *segid,
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vm_ooffset_t *segoff, size_t *len, int *prot, int *flags)
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{
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struct vm_memmap memmap;
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int error;
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bzero(&memmap, sizeof(struct vm_memmap));
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memmap.gpa = *gpa;
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error = ioctl(ctx->fd, VM_MMAP_GETNEXT, &memmap);
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if (error == 0) {
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*gpa = memmap.gpa;
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*segid = memmap.segid;
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*segoff = memmap.segoff;
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*len = memmap.len;
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*prot = memmap.prot;
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*flags = memmap.flags;
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}
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return (error);
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}
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/*
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* Return 0 if the segments are identical and non-zero otherwise.
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*
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* This is slightly complicated by the fact that only device memory segments
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* are named.
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*/
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static int
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cmpseg(size_t len, const char *str, size_t len2, const char *str2)
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{
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if (len == len2) {
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if ((!str && !str2) || (str && str2 && !strcmp(str, str2)))
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return (0);
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}
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return (-1);
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}
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static int
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vm_alloc_memseg(struct vmctx *ctx, int segid, size_t len, const char *name)
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{
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struct vm_memseg memseg;
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size_t n;
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int error;
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/*
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* If the memory segment has already been created then just return.
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* This is the usual case for the SYSMEM segment created by userspace
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* loaders like bhyveload(8).
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*/
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error = vm_get_memseg(ctx, segid, &memseg.len, memseg.name,
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sizeof(memseg.name));
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if (error)
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return (error);
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if (memseg.len != 0) {
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if (cmpseg(len, name, memseg.len, VM_MEMSEG_NAME(&memseg))) {
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errno = EINVAL;
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return (-1);
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} else {
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return (0);
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}
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}
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bzero(&memseg, sizeof(struct vm_memseg));
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memseg.segid = segid;
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memseg.len = len;
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if (name != NULL) {
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n = strlcpy(memseg.name, name, sizeof(memseg.name));
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if (n >= sizeof(memseg.name)) {
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errno = ENAMETOOLONG;
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return (-1);
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}
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}
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error = ioctl(ctx->fd, VM_ALLOC_MEMSEG, &memseg);
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return (error);
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}
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int
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vm_get_memseg(struct vmctx *ctx, int segid, size_t *lenp, char *namebuf,
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size_t bufsize)
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{
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struct vm_memseg memseg;
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size_t n;
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int error;
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memseg.segid = segid;
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error = ioctl(ctx->fd, VM_GET_MEMSEG, &memseg);
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if (error == 0) {
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*lenp = memseg.len;
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n = strlcpy(namebuf, memseg.name, bufsize);
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if (n >= bufsize) {
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errno = ENAMETOOLONG;
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error = -1;
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}
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}
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return (error);
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}
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static int
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setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char *base)
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{
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char *ptr;
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int error, flags;
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/* Map 'len' bytes starting at 'gpa' in the guest address space */
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error = vm_mmap_memseg(ctx, gpa, VM_SYSMEM, gpa, len, PROT_ALL);
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if (error)
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return (error);
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flags = MAP_SHARED | MAP_FIXED;
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if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
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flags |= MAP_NOCORE;
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|
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/* mmap into the process address space on the host */
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ptr = mmap(base + gpa, len, PROT_RW, flags, ctx->fd, gpa);
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if (ptr == MAP_FAILED)
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return (-1);
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return (0);
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}
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int
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vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms)
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{
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size_t objsize, len;
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vm_paddr_t gpa;
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char *baseaddr, *ptr;
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int error;
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assert(vms == VM_MMAP_ALL);
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|
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/*
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* If 'memsize' cannot fit entirely in the 'lowmem' segment then
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* create another 'highmem' segment above 4GB for the remainder.
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*/
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if (memsize > ctx->lowmem_limit) {
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ctx->lowmem = ctx->lowmem_limit;
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ctx->highmem = memsize - ctx->lowmem_limit;
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objsize = 4*GB + ctx->highmem;
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} else {
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ctx->lowmem = memsize;
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ctx->highmem = 0;
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objsize = ctx->lowmem;
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}
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|
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error = vm_alloc_memseg(ctx, VM_SYSMEM, objsize, NULL);
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if (error)
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return (error);
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|
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/*
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* Stake out a contiguous region covering the guest physical memory
|
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* and the adjoining guard regions.
|
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*/
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len = VM_MMAP_GUARD_SIZE + objsize + VM_MMAP_GUARD_SIZE;
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ptr = mmap(NULL, len, PROT_NONE, MAP_GUARD | MAP_ALIGNED_SUPER, -1, 0);
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if (ptr == MAP_FAILED)
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return (-1);
|
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|
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baseaddr = ptr + VM_MMAP_GUARD_SIZE;
|
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if (ctx->highmem > 0) {
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gpa = 4*GB;
|
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len = ctx->highmem;
|
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error = setup_memory_segment(ctx, gpa, len, baseaddr);
|
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if (error)
|
|
return (error);
|
|
}
|
|
|
|
if (ctx->lowmem > 0) {
|
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gpa = 0;
|
|
len = ctx->lowmem;
|
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error = setup_memory_segment(ctx, gpa, len, baseaddr);
|
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if (error)
|
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return (error);
|
|
}
|
|
|
|
ctx->baseaddr = baseaddr;
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Returns a non-NULL pointer if [gaddr, gaddr+len) is entirely contained in
|
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* the lowmem or highmem regions.
|
|
*
|
|
* In particular return NULL if [gaddr, gaddr+len) falls in guest MMIO region.
|
|
* The instruction emulation code depends on this behavior.
|
|
*/
|
|
void *
|
|
vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len)
|
|
{
|
|
|
|
if (ctx->lowmem > 0) {
|
|
if (gaddr < ctx->lowmem && len <= ctx->lowmem &&
|
|
gaddr + len <= ctx->lowmem)
|
|
return (ctx->baseaddr + gaddr);
|
|
}
|
|
|
|
if (ctx->highmem > 0) {
|
|
if (gaddr >= 4*GB) {
|
|
if (gaddr < 4*GB + ctx->highmem &&
|
|
len <= ctx->highmem &&
|
|
gaddr + len <= 4*GB + ctx->highmem)
|
|
return (ctx->baseaddr + gaddr);
|
|
}
|
|
}
|
|
|
|
return (NULL);
|
|
}
|
|
|
|
vm_paddr_t
|
|
vm_rev_map_gpa(struct vmctx *ctx, void *addr)
|
|
{
|
|
vm_paddr_t offaddr;
|
|
|
|
offaddr = (char *)addr - ctx->baseaddr;
|
|
|
|
if (ctx->lowmem > 0)
|
|
if (offaddr >= 0 && offaddr <= ctx->lowmem)
|
|
return (offaddr);
|
|
|
|
if (ctx->highmem > 0)
|
|
if (offaddr >= 4*GB && offaddr < 4*GB + ctx->highmem)
|
|
return (offaddr);
|
|
|
|
return ((vm_paddr_t)-1);
|
|
}
|
|
|
|
/* TODO: maximum size for vmname */
|
|
int
|
|
vm_get_name(struct vmctx *ctx, char *buf, size_t max_len)
|
|
{
|
|
|
|
if (strlcpy(buf, ctx->name, max_len) >= max_len)
|
|
return (EINVAL);
|
|
return (0);
|
|
}
|
|
|
|
size_t
|
|
vm_get_lowmem_size(struct vmctx *ctx)
|
|
{
|
|
|
|
return (ctx->lowmem);
|
|
}
|
|
|
|
size_t
|
|
vm_get_highmem_size(struct vmctx *ctx)
|
|
{
|
|
|
|
return (ctx->highmem);
|
|
}
|
|
|
|
void *
|
|
vm_create_devmem(struct vmctx *ctx, int segid, const char *name, size_t len)
|
|
{
|
|
char pathname[MAXPATHLEN];
|
|
size_t len2;
|
|
char *base, *ptr;
|
|
int fd, error, flags;
|
|
|
|
fd = -1;
|
|
ptr = MAP_FAILED;
|
|
if (name == NULL || strlen(name) == 0) {
|
|
errno = EINVAL;
|
|
goto done;
|
|
}
|
|
|
|
error = vm_alloc_memseg(ctx, segid, len, name);
|
|
if (error)
|
|
goto done;
|
|
|
|
strlcpy(pathname, "/dev/vmm.io/", sizeof(pathname));
|
|
strlcat(pathname, ctx->name, sizeof(pathname));
|
|
strlcat(pathname, ".", sizeof(pathname));
|
|
strlcat(pathname, name, sizeof(pathname));
|
|
|
|
fd = open(pathname, O_RDWR);
|
|
if (fd < 0)
|
|
goto done;
|
|
|
|
/*
|
|
* Stake out a contiguous region covering the device memory and the
|
|
* adjoining guard regions.
|
|
*/
|
|
len2 = VM_MMAP_GUARD_SIZE + len + VM_MMAP_GUARD_SIZE;
|
|
base = mmap(NULL, len2, PROT_NONE, MAP_GUARD | MAP_ALIGNED_SUPER, -1,
|
|
0);
|
|
if (base == MAP_FAILED)
|
|
goto done;
|
|
|
|
flags = MAP_SHARED | MAP_FIXED;
|
|
if ((ctx->memflags & VM_MEM_F_INCORE) == 0)
|
|
flags |= MAP_NOCORE;
|
|
|
|
/* mmap the devmem region in the host address space */
|
|
ptr = mmap(base + VM_MMAP_GUARD_SIZE, len, PROT_RW, flags, fd, 0);
|
|
done:
|
|
if (fd >= 0)
|
|
close(fd);
|
|
return (ptr);
|
|
}
|
|
|
|
int
|
|
vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
|
|
uint64_t base, uint32_t limit, uint32_t access)
|
|
{
|
|
int error;
|
|
struct vm_seg_desc vmsegdesc;
|
|
|
|
bzero(&vmsegdesc, sizeof(vmsegdesc));
|
|
vmsegdesc.cpuid = vcpu;
|
|
vmsegdesc.regnum = reg;
|
|
vmsegdesc.desc.base = base;
|
|
vmsegdesc.desc.limit = limit;
|
|
vmsegdesc.desc.access = access;
|
|
|
|
error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
|
|
uint64_t *base, uint32_t *limit, uint32_t *access)
|
|
{
|
|
int error;
|
|
struct vm_seg_desc vmsegdesc;
|
|
|
|
bzero(&vmsegdesc, sizeof(vmsegdesc));
|
|
vmsegdesc.cpuid = vcpu;
|
|
vmsegdesc.regnum = reg;
|
|
|
|
error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc);
|
|
if (error == 0) {
|
|
*base = vmsegdesc.desc.base;
|
|
*limit = vmsegdesc.desc.limit;
|
|
*access = vmsegdesc.desc.access;
|
|
}
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc)
|
|
{
|
|
int error;
|
|
|
|
error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit,
|
|
&seg_desc->access);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val)
|
|
{
|
|
int error;
|
|
struct vm_register vmreg;
|
|
|
|
bzero(&vmreg, sizeof(vmreg));
|
|
vmreg.cpuid = vcpu;
|
|
vmreg.regnum = reg;
|
|
vmreg.regval = val;
|
|
|
|
error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val)
|
|
{
|
|
int error;
|
|
struct vm_register vmreg;
|
|
|
|
bzero(&vmreg, sizeof(vmreg));
|
|
vmreg.cpuid = vcpu;
|
|
vmreg.regnum = reg;
|
|
|
|
error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg);
|
|
*ret_val = vmreg.regval;
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_set_register_set(struct vmctx *ctx, int vcpu, unsigned int count,
|
|
const int *regnums, uint64_t *regvals)
|
|
{
|
|
int error;
|
|
struct vm_register_set vmregset;
|
|
|
|
bzero(&vmregset, sizeof(vmregset));
|
|
vmregset.cpuid = vcpu;
|
|
vmregset.count = count;
|
|
vmregset.regnums = regnums;
|
|
vmregset.regvals = regvals;
|
|
|
|
error = ioctl(ctx->fd, VM_SET_REGISTER_SET, &vmregset);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_get_register_set(struct vmctx *ctx, int vcpu, unsigned int count,
|
|
const int *regnums, uint64_t *regvals)
|
|
{
|
|
int error;
|
|
struct vm_register_set vmregset;
|
|
|
|
bzero(&vmregset, sizeof(vmregset));
|
|
vmregset.cpuid = vcpu;
|
|
vmregset.count = count;
|
|
vmregset.regnums = regnums;
|
|
vmregset.regvals = regvals;
|
|
|
|
error = ioctl(ctx->fd, VM_GET_REGISTER_SET, &vmregset);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_run(struct vmctx *ctx, int vcpu, struct vm_exit *vmexit)
|
|
{
|
|
int error;
|
|
struct vm_run vmrun;
|
|
|
|
bzero(&vmrun, sizeof(vmrun));
|
|
vmrun.cpuid = vcpu;
|
|
|
|
error = ioctl(ctx->fd, VM_RUN, &vmrun);
|
|
bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit));
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_suspend(struct vmctx *ctx, enum vm_suspend_how how)
|
|
{
|
|
struct vm_suspend vmsuspend;
|
|
|
|
bzero(&vmsuspend, sizeof(vmsuspend));
|
|
vmsuspend.how = how;
|
|
return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend));
|
|
}
|
|
|
|
int
|
|
vm_reinit(struct vmctx *ctx)
|
|
{
|
|
|
|
return (ioctl(ctx->fd, VM_REINIT, 0));
|
|
}
|
|
|
|
int
|
|
vm_inject_exception(struct vmctx *ctx, int vcpu, int vector, int errcode_valid,
|
|
uint32_t errcode, int restart_instruction)
|
|
{
|
|
struct vm_exception exc;
|
|
|
|
exc.cpuid = vcpu;
|
|
exc.vector = vector;
|
|
exc.error_code = errcode;
|
|
exc.error_code_valid = errcode_valid;
|
|
exc.restart_instruction = restart_instruction;
|
|
|
|
return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc));
|
|
}
|
|
|
|
int
|
|
vm_apicid2vcpu(struct vmctx *ctx, int apicid)
|
|
{
|
|
/*
|
|
* The apic id associated with the 'vcpu' has the same numerical value
|
|
* as the 'vcpu' itself.
|
|
*/
|
|
return (apicid);
|
|
}
|
|
|
|
int
|
|
vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector)
|
|
{
|
|
struct vm_lapic_irq vmirq;
|
|
|
|
bzero(&vmirq, sizeof(vmirq));
|
|
vmirq.cpuid = vcpu;
|
|
vmirq.vector = vector;
|
|
|
|
return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq));
|
|
}
|
|
|
|
int
|
|
vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector)
|
|
{
|
|
struct vm_lapic_irq vmirq;
|
|
|
|
bzero(&vmirq, sizeof(vmirq));
|
|
vmirq.cpuid = vcpu;
|
|
vmirq.vector = vector;
|
|
|
|
return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq));
|
|
}
|
|
|
|
int
|
|
vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg)
|
|
{
|
|
struct vm_lapic_msi vmmsi;
|
|
|
|
bzero(&vmmsi, sizeof(vmmsi));
|
|
vmmsi.addr = addr;
|
|
vmmsi.msg = msg;
|
|
|
|
return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi));
|
|
}
|
|
|
|
int
|
|
vm_ioapic_assert_irq(struct vmctx *ctx, int irq)
|
|
{
|
|
struct vm_ioapic_irq ioapic_irq;
|
|
|
|
bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
|
|
ioapic_irq.irq = irq;
|
|
|
|
return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq));
|
|
}
|
|
|
|
int
|
|
vm_ioapic_deassert_irq(struct vmctx *ctx, int irq)
|
|
{
|
|
struct vm_ioapic_irq ioapic_irq;
|
|
|
|
bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
|
|
ioapic_irq.irq = irq;
|
|
|
|
return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq));
|
|
}
|
|
|
|
int
|
|
vm_ioapic_pulse_irq(struct vmctx *ctx, int irq)
|
|
{
|
|
struct vm_ioapic_irq ioapic_irq;
|
|
|
|
bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq));
|
|
ioapic_irq.irq = irq;
|
|
|
|
return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq));
|
|
}
|
|
|
|
int
|
|
vm_ioapic_pincount(struct vmctx *ctx, int *pincount)
|
|
{
|
|
|
|
return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount));
|
|
}
|
|
|
|
int
|
|
vm_readwrite_kernemu_device(struct vmctx *ctx, int vcpu, vm_paddr_t gpa,
|
|
bool write, int size, uint64_t *value)
|
|
{
|
|
struct vm_readwrite_kernemu_device irp = {
|
|
.vcpuid = vcpu,
|
|
.access_width = fls(size) - 1,
|
|
.gpa = gpa,
|
|
.value = write ? *value : ~0ul,
|
|
};
|
|
long cmd = (write ? VM_SET_KERNEMU_DEV : VM_GET_KERNEMU_DEV);
|
|
int rc;
|
|
|
|
rc = ioctl(ctx->fd, cmd, &irp);
|
|
if (rc == 0 && !write)
|
|
*value = irp.value;
|
|
return (rc);
|
|
}
|
|
|
|
int
|
|
vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
|
|
{
|
|
struct vm_isa_irq isa_irq;
|
|
|
|
bzero(&isa_irq, sizeof(struct vm_isa_irq));
|
|
isa_irq.atpic_irq = atpic_irq;
|
|
isa_irq.ioapic_irq = ioapic_irq;
|
|
|
|
return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq));
|
|
}
|
|
|
|
int
|
|
vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
|
|
{
|
|
struct vm_isa_irq isa_irq;
|
|
|
|
bzero(&isa_irq, sizeof(struct vm_isa_irq));
|
|
isa_irq.atpic_irq = atpic_irq;
|
|
isa_irq.ioapic_irq = ioapic_irq;
|
|
|
|
return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq));
|
|
}
|
|
|
|
int
|
|
vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq)
|
|
{
|
|
struct vm_isa_irq isa_irq;
|
|
|
|
bzero(&isa_irq, sizeof(struct vm_isa_irq));
|
|
isa_irq.atpic_irq = atpic_irq;
|
|
isa_irq.ioapic_irq = ioapic_irq;
|
|
|
|
return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq));
|
|
}
|
|
|
|
int
|
|
vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq,
|
|
enum vm_intr_trigger trigger)
|
|
{
|
|
struct vm_isa_irq_trigger isa_irq_trigger;
|
|
|
|
bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger));
|
|
isa_irq_trigger.atpic_irq = atpic_irq;
|
|
isa_irq_trigger.trigger = trigger;
|
|
|
|
return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger));
|
|
}
|
|
|
|
int
|
|
vm_inject_nmi(struct vmctx *ctx, int vcpu)
|
|
{
|
|
struct vm_nmi vmnmi;
|
|
|
|
bzero(&vmnmi, sizeof(vmnmi));
|
|
vmnmi.cpuid = vcpu;
|
|
|
|
return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi));
|
|
}
|
|
|
|
static const char *capstrmap[] = {
|
|
[VM_CAP_HALT_EXIT] = "hlt_exit",
|
|
[VM_CAP_MTRAP_EXIT] = "mtrap_exit",
|
|
[VM_CAP_PAUSE_EXIT] = "pause_exit",
|
|
[VM_CAP_UNRESTRICTED_GUEST] = "unrestricted_guest",
|
|
[VM_CAP_ENABLE_INVPCID] = "enable_invpcid",
|
|
[VM_CAP_BPT_EXIT] = "bpt_exit",
|
|
};
|
|
|
|
int
|
|
vm_capability_name2type(const char *capname)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < nitems(capstrmap); i++) {
|
|
if (strcmp(capstrmap[i], capname) == 0)
|
|
return (i);
|
|
}
|
|
|
|
return (-1);
|
|
}
|
|
|
|
const char *
|
|
vm_capability_type2name(int type)
|
|
{
|
|
if (type >= 0 && type < nitems(capstrmap))
|
|
return (capstrmap[type]);
|
|
|
|
return (NULL);
|
|
}
|
|
|
|
int
|
|
vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
|
|
int *retval)
|
|
{
|
|
int error;
|
|
struct vm_capability vmcap;
|
|
|
|
bzero(&vmcap, sizeof(vmcap));
|
|
vmcap.cpuid = vcpu;
|
|
vmcap.captype = cap;
|
|
|
|
error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap);
|
|
*retval = vmcap.capval;
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val)
|
|
{
|
|
struct vm_capability vmcap;
|
|
|
|
bzero(&vmcap, sizeof(vmcap));
|
|
vmcap.cpuid = vcpu;
|
|
vmcap.captype = cap;
|
|
vmcap.capval = val;
|
|
|
|
return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap));
|
|
}
|
|
|
|
int
|
|
vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
|
|
{
|
|
struct vm_pptdev pptdev;
|
|
|
|
bzero(&pptdev, sizeof(pptdev));
|
|
pptdev.bus = bus;
|
|
pptdev.slot = slot;
|
|
pptdev.func = func;
|
|
|
|
return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev));
|
|
}
|
|
|
|
int
|
|
vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func)
|
|
{
|
|
struct vm_pptdev pptdev;
|
|
|
|
bzero(&pptdev, sizeof(pptdev));
|
|
pptdev.bus = bus;
|
|
pptdev.slot = slot;
|
|
pptdev.func = func;
|
|
|
|
return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev));
|
|
}
|
|
|
|
int
|
|
vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
|
|
vm_paddr_t gpa, size_t len, vm_paddr_t hpa)
|
|
{
|
|
struct vm_pptdev_mmio pptmmio;
|
|
|
|
bzero(&pptmmio, sizeof(pptmmio));
|
|
pptmmio.bus = bus;
|
|
pptmmio.slot = slot;
|
|
pptmmio.func = func;
|
|
pptmmio.gpa = gpa;
|
|
pptmmio.len = len;
|
|
pptmmio.hpa = hpa;
|
|
|
|
return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio));
|
|
}
|
|
|
|
int
|
|
vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
|
|
uint64_t addr, uint64_t msg, int numvec)
|
|
{
|
|
struct vm_pptdev_msi pptmsi;
|
|
|
|
bzero(&pptmsi, sizeof(pptmsi));
|
|
pptmsi.vcpu = vcpu;
|
|
pptmsi.bus = bus;
|
|
pptmsi.slot = slot;
|
|
pptmsi.func = func;
|
|
pptmsi.msg = msg;
|
|
pptmsi.addr = addr;
|
|
pptmsi.numvec = numvec;
|
|
|
|
return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi));
|
|
}
|
|
|
|
int
|
|
vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func,
|
|
int idx, uint64_t addr, uint64_t msg, uint32_t vector_control)
|
|
{
|
|
struct vm_pptdev_msix pptmsix;
|
|
|
|
bzero(&pptmsix, sizeof(pptmsix));
|
|
pptmsix.vcpu = vcpu;
|
|
pptmsix.bus = bus;
|
|
pptmsix.slot = slot;
|
|
pptmsix.func = func;
|
|
pptmsix.idx = idx;
|
|
pptmsix.msg = msg;
|
|
pptmsix.addr = addr;
|
|
pptmsix.vector_control = vector_control;
|
|
|
|
return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix);
|
|
}
|
|
|
|
uint64_t *
|
|
vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
|
|
int *ret_entries)
|
|
{
|
|
int error;
|
|
|
|
static struct vm_stats vmstats;
|
|
|
|
vmstats.cpuid = vcpu;
|
|
|
|
error = ioctl(ctx->fd, VM_STATS, &vmstats);
|
|
if (error == 0) {
|
|
if (ret_entries)
|
|
*ret_entries = vmstats.num_entries;
|
|
if (ret_tv)
|
|
*ret_tv = vmstats.tv;
|
|
return (vmstats.statbuf);
|
|
} else
|
|
return (NULL);
|
|
}
|
|
|
|
const char *
|
|
vm_get_stat_desc(struct vmctx *ctx, int index)
|
|
{
|
|
static struct vm_stat_desc statdesc;
|
|
|
|
statdesc.index = index;
|
|
if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0)
|
|
return (statdesc.desc);
|
|
else
|
|
return (NULL);
|
|
}
|
|
|
|
int
|
|
vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state)
|
|
{
|
|
int error;
|
|
struct vm_x2apic x2apic;
|
|
|
|
bzero(&x2apic, sizeof(x2apic));
|
|
x2apic.cpuid = vcpu;
|
|
|
|
error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic);
|
|
*state = x2apic.state;
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state)
|
|
{
|
|
int error;
|
|
struct vm_x2apic x2apic;
|
|
|
|
bzero(&x2apic, sizeof(x2apic));
|
|
x2apic.cpuid = vcpu;
|
|
x2apic.state = state;
|
|
|
|
error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic);
|
|
|
|
return (error);
|
|
}
|
|
|
|
/*
|
|
* From Intel Vol 3a:
|
|
* Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT
|
|
*/
|
|
int
|
|
vcpu_reset(struct vmctx *vmctx, int vcpu)
|
|
{
|
|
int error;
|
|
uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx;
|
|
uint32_t desc_access, desc_limit;
|
|
uint16_t sel;
|
|
|
|
zero = 0;
|
|
|
|
rflags = 0x2;
|
|
error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags);
|
|
if (error)
|
|
goto done;
|
|
|
|
rip = 0xfff0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0)
|
|
goto done;
|
|
|
|
cr0 = CR0_NE;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0)
|
|
goto done;
|
|
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0)
|
|
goto done;
|
|
|
|
cr4 = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0)
|
|
goto done;
|
|
|
|
/*
|
|
* CS: present, r/w, accessed, 16-bit, byte granularity, usable
|
|
*/
|
|
desc_base = 0xffff0000;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x0093;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0xf000;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0)
|
|
goto done;
|
|
|
|
/*
|
|
* SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity
|
|
*/
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x0093;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0)
|
|
goto done;
|
|
|
|
/* General purpose registers */
|
|
rdx = 0xf00;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0)
|
|
goto done;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0)
|
|
goto done;
|
|
|
|
/* GDTR, IDTR */
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error != 0)
|
|
goto done;
|
|
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR,
|
|
desc_base, desc_limit, desc_access);
|
|
if (error != 0)
|
|
goto done;
|
|
|
|
/* TR */
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x0000008b;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0)
|
|
goto done;
|
|
|
|
/* LDTR */
|
|
desc_base = 0;
|
|
desc_limit = 0xffff;
|
|
desc_access = 0x00000082;
|
|
error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base,
|
|
desc_limit, desc_access);
|
|
if (error)
|
|
goto done;
|
|
|
|
sel = 0;
|
|
if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0)
|
|
goto done;
|
|
|
|
/* XXX cr2, debug registers */
|
|
|
|
error = 0;
|
|
done:
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num)
|
|
{
|
|
int error, i;
|
|
struct vm_gpa_pte gpapte;
|
|
|
|
bzero(&gpapte, sizeof(gpapte));
|
|
gpapte.gpa = gpa;
|
|
|
|
error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte);
|
|
|
|
if (error == 0) {
|
|
*num = gpapte.ptenum;
|
|
for (i = 0; i < gpapte.ptenum; i++)
|
|
pte[i] = gpapte.pte[i];
|
|
}
|
|
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities)
|
|
{
|
|
int error;
|
|
struct vm_hpet_cap cap;
|
|
|
|
bzero(&cap, sizeof(struct vm_hpet_cap));
|
|
error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap);
|
|
if (capabilities != NULL)
|
|
*capabilities = cap.capabilities;
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
|
|
uint64_t gla, int prot, uint64_t *gpa, int *fault)
|
|
{
|
|
struct vm_gla2gpa gg;
|
|
int error;
|
|
|
|
bzero(&gg, sizeof(struct vm_gla2gpa));
|
|
gg.vcpuid = vcpu;
|
|
gg.prot = prot;
|
|
gg.gla = gla;
|
|
gg.paging = *paging;
|
|
|
|
error = ioctl(ctx->fd, VM_GLA2GPA, &gg);
|
|
if (error == 0) {
|
|
*fault = gg.fault;
|
|
*gpa = gg.gpa;
|
|
}
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_gla2gpa_nofault(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
|
|
uint64_t gla, int prot, uint64_t *gpa, int *fault)
|
|
{
|
|
struct vm_gla2gpa gg;
|
|
int error;
|
|
|
|
bzero(&gg, sizeof(struct vm_gla2gpa));
|
|
gg.vcpuid = vcpu;
|
|
gg.prot = prot;
|
|
gg.gla = gla;
|
|
gg.paging = *paging;
|
|
|
|
error = ioctl(ctx->fd, VM_GLA2GPA_NOFAULT, &gg);
|
|
if (error == 0) {
|
|
*fault = gg.fault;
|
|
*gpa = gg.gpa;
|
|
}
|
|
return (error);
|
|
}
|
|
|
|
#ifndef min
|
|
#define min(a,b) (((a) < (b)) ? (a) : (b))
|
|
#endif
|
|
|
|
int
|
|
vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging,
|
|
uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt,
|
|
int *fault)
|
|
{
|
|
void *va;
|
|
uint64_t gpa;
|
|
int error, i, n, off;
|
|
|
|
for (i = 0; i < iovcnt; i++) {
|
|
iov[i].iov_base = 0;
|
|
iov[i].iov_len = 0;
|
|
}
|
|
|
|
while (len) {
|
|
assert(iovcnt > 0);
|
|
error = vm_gla2gpa(ctx, vcpu, paging, gla, prot, &gpa, fault);
|
|
if (error || *fault)
|
|
return (error);
|
|
|
|
off = gpa & PAGE_MASK;
|
|
n = min(len, PAGE_SIZE - off);
|
|
|
|
va = vm_map_gpa(ctx, gpa, n);
|
|
if (va == NULL)
|
|
return (EFAULT);
|
|
|
|
iov->iov_base = va;
|
|
iov->iov_len = n;
|
|
iov++;
|
|
iovcnt--;
|
|
|
|
gla += n;
|
|
len -= n;
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
vm_copy_teardown(struct vmctx *ctx, int vcpu, struct iovec *iov, int iovcnt)
|
|
{
|
|
|
|
return;
|
|
}
|
|
|
|
void
|
|
vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len)
|
|
{
|
|
const char *src;
|
|
char *dst;
|
|
size_t n;
|
|
|
|
dst = vp;
|
|
while (len) {
|
|
assert(iov->iov_len);
|
|
n = min(len, iov->iov_len);
|
|
src = iov->iov_base;
|
|
bcopy(src, dst, n);
|
|
|
|
iov++;
|
|
dst += n;
|
|
len -= n;
|
|
}
|
|
}
|
|
|
|
void
|
|
vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov,
|
|
size_t len)
|
|
{
|
|
const char *src;
|
|
char *dst;
|
|
size_t n;
|
|
|
|
src = vp;
|
|
while (len) {
|
|
assert(iov->iov_len);
|
|
n = min(len, iov->iov_len);
|
|
dst = iov->iov_base;
|
|
bcopy(src, dst, n);
|
|
|
|
iov++;
|
|
src += n;
|
|
len -= n;
|
|
}
|
|
}
|
|
|
|
static int
|
|
vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus)
|
|
{
|
|
struct vm_cpuset vm_cpuset;
|
|
int error;
|
|
|
|
bzero(&vm_cpuset, sizeof(struct vm_cpuset));
|
|
vm_cpuset.which = which;
|
|
vm_cpuset.cpusetsize = sizeof(cpuset_t);
|
|
vm_cpuset.cpus = cpus;
|
|
|
|
error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus)
|
|
{
|
|
|
|
return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus));
|
|
}
|
|
|
|
int
|
|
vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus)
|
|
{
|
|
|
|
return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus));
|
|
}
|
|
|
|
int
|
|
vm_debug_cpus(struct vmctx *ctx, cpuset_t *cpus)
|
|
{
|
|
|
|
return (vm_get_cpus(ctx, VM_DEBUG_CPUS, cpus));
|
|
}
|
|
|
|
int
|
|
vm_activate_cpu(struct vmctx *ctx, int vcpu)
|
|
{
|
|
struct vm_activate_cpu ac;
|
|
int error;
|
|
|
|
bzero(&ac, sizeof(struct vm_activate_cpu));
|
|
ac.vcpuid = vcpu;
|
|
error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_suspend_cpu(struct vmctx *ctx, int vcpu)
|
|
{
|
|
struct vm_activate_cpu ac;
|
|
int error;
|
|
|
|
bzero(&ac, sizeof(struct vm_activate_cpu));
|
|
ac.vcpuid = vcpu;
|
|
error = ioctl(ctx->fd, VM_SUSPEND_CPU, &ac);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_resume_cpu(struct vmctx *ctx, int vcpu)
|
|
{
|
|
struct vm_activate_cpu ac;
|
|
int error;
|
|
|
|
bzero(&ac, sizeof(struct vm_activate_cpu));
|
|
ac.vcpuid = vcpu;
|
|
error = ioctl(ctx->fd, VM_RESUME_CPU, &ac);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2)
|
|
{
|
|
struct vm_intinfo vmii;
|
|
int error;
|
|
|
|
bzero(&vmii, sizeof(struct vm_intinfo));
|
|
vmii.vcpuid = vcpu;
|
|
error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii);
|
|
if (error == 0) {
|
|
*info1 = vmii.info1;
|
|
*info2 = vmii.info2;
|
|
}
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1)
|
|
{
|
|
struct vm_intinfo vmii;
|
|
int error;
|
|
|
|
bzero(&vmii, sizeof(struct vm_intinfo));
|
|
vmii.vcpuid = vcpu;
|
|
vmii.info1 = info1;
|
|
error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_rtc_write(struct vmctx *ctx, int offset, uint8_t value)
|
|
{
|
|
struct vm_rtc_data rtcdata;
|
|
int error;
|
|
|
|
bzero(&rtcdata, sizeof(struct vm_rtc_data));
|
|
rtcdata.offset = offset;
|
|
rtcdata.value = value;
|
|
error = ioctl(ctx->fd, VM_RTC_WRITE, &rtcdata);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_rtc_read(struct vmctx *ctx, int offset, uint8_t *retval)
|
|
{
|
|
struct vm_rtc_data rtcdata;
|
|
int error;
|
|
|
|
bzero(&rtcdata, sizeof(struct vm_rtc_data));
|
|
rtcdata.offset = offset;
|
|
error = ioctl(ctx->fd, VM_RTC_READ, &rtcdata);
|
|
if (error == 0)
|
|
*retval = rtcdata.value;
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_rtc_settime(struct vmctx *ctx, time_t secs)
|
|
{
|
|
struct vm_rtc_time rtctime;
|
|
int error;
|
|
|
|
bzero(&rtctime, sizeof(struct vm_rtc_time));
|
|
rtctime.secs = secs;
|
|
error = ioctl(ctx->fd, VM_RTC_SETTIME, &rtctime);
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_rtc_gettime(struct vmctx *ctx, time_t *secs)
|
|
{
|
|
struct vm_rtc_time rtctime;
|
|
int error;
|
|
|
|
bzero(&rtctime, sizeof(struct vm_rtc_time));
|
|
error = ioctl(ctx->fd, VM_RTC_GETTIME, &rtctime);
|
|
if (error == 0)
|
|
*secs = rtctime.secs;
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_restart_instruction(void *arg, int vcpu)
|
|
{
|
|
struct vmctx *ctx = arg;
|
|
|
|
return (ioctl(ctx->fd, VM_RESTART_INSTRUCTION, &vcpu));
|
|
}
|
|
|
|
int
|
|
vm_snapshot_req(struct vm_snapshot_meta *meta)
|
|
{
|
|
|
|
if (ioctl(meta->ctx->fd, VM_SNAPSHOT_REQ, meta) == -1) {
|
|
#ifdef SNAPSHOT_DEBUG
|
|
fprintf(stderr, "%s: snapshot failed for %s: %d\r\n",
|
|
__func__, meta->dev_name, errno);
|
|
#endif
|
|
return (-1);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
vm_restore_time(struct vmctx *ctx)
|
|
{
|
|
int dummy;
|
|
|
|
dummy = 0;
|
|
return (ioctl(ctx->fd, VM_RESTORE_TIME, &dummy));
|
|
}
|
|
|
|
int
|
|
vm_set_topology(struct vmctx *ctx,
|
|
uint16_t sockets, uint16_t cores, uint16_t threads, uint16_t maxcpus)
|
|
{
|
|
struct vm_cpu_topology topology;
|
|
|
|
bzero(&topology, sizeof (struct vm_cpu_topology));
|
|
topology.sockets = sockets;
|
|
topology.cores = cores;
|
|
topology.threads = threads;
|
|
topology.maxcpus = maxcpus;
|
|
return (ioctl(ctx->fd, VM_SET_TOPOLOGY, &topology));
|
|
}
|
|
|
|
int
|
|
vm_get_topology(struct vmctx *ctx,
|
|
uint16_t *sockets, uint16_t *cores, uint16_t *threads, uint16_t *maxcpus)
|
|
{
|
|
struct vm_cpu_topology topology;
|
|
int error;
|
|
|
|
bzero(&topology, sizeof (struct vm_cpu_topology));
|
|
error = ioctl(ctx->fd, VM_GET_TOPOLOGY, &topology);
|
|
if (error == 0) {
|
|
*sockets = topology.sockets;
|
|
*cores = topology.cores;
|
|
*threads = topology.threads;
|
|
*maxcpus = topology.maxcpus;
|
|
}
|
|
return (error);
|
|
}
|
|
|
|
int
|
|
vm_get_device_fd(struct vmctx *ctx)
|
|
{
|
|
|
|
return (ctx->fd);
|
|
}
|
|
|
|
const cap_ioctl_t *
|
|
vm_get_ioctls(size_t *len)
|
|
{
|
|
cap_ioctl_t *cmds;
|
|
/* keep in sync with machine/vmm_dev.h */
|
|
static const cap_ioctl_t vm_ioctl_cmds[] = { VM_RUN, VM_SUSPEND, VM_REINIT,
|
|
VM_ALLOC_MEMSEG, VM_GET_MEMSEG, VM_MMAP_MEMSEG, VM_MMAP_MEMSEG,
|
|
VM_MMAP_GETNEXT, VM_SET_REGISTER, VM_GET_REGISTER,
|
|
VM_SET_SEGMENT_DESCRIPTOR, VM_GET_SEGMENT_DESCRIPTOR,
|
|
VM_SET_REGISTER_SET, VM_GET_REGISTER_SET,
|
|
VM_SET_KERNEMU_DEV, VM_GET_KERNEMU_DEV,
|
|
VM_INJECT_EXCEPTION, VM_LAPIC_IRQ, VM_LAPIC_LOCAL_IRQ,
|
|
VM_LAPIC_MSI, VM_IOAPIC_ASSERT_IRQ, VM_IOAPIC_DEASSERT_IRQ,
|
|
VM_IOAPIC_PULSE_IRQ, VM_IOAPIC_PINCOUNT, VM_ISA_ASSERT_IRQ,
|
|
VM_ISA_DEASSERT_IRQ, VM_ISA_PULSE_IRQ, VM_ISA_SET_IRQ_TRIGGER,
|
|
VM_SET_CAPABILITY, VM_GET_CAPABILITY, VM_BIND_PPTDEV,
|
|
VM_UNBIND_PPTDEV, VM_MAP_PPTDEV_MMIO, VM_PPTDEV_MSI,
|
|
VM_PPTDEV_MSIX, VM_INJECT_NMI, VM_STATS, VM_STAT_DESC,
|
|
VM_SET_X2APIC_STATE, VM_GET_X2APIC_STATE,
|
|
VM_GET_HPET_CAPABILITIES, VM_GET_GPA_PMAP, VM_GLA2GPA,
|
|
VM_GLA2GPA_NOFAULT,
|
|
VM_ACTIVATE_CPU, VM_GET_CPUS, VM_SUSPEND_CPU, VM_RESUME_CPU,
|
|
VM_SET_INTINFO, VM_GET_INTINFO,
|
|
VM_RTC_WRITE, VM_RTC_READ, VM_RTC_SETTIME, VM_RTC_GETTIME,
|
|
VM_RESTART_INSTRUCTION, VM_SET_TOPOLOGY, VM_GET_TOPOLOGY };
|
|
|
|
if (len == NULL) {
|
|
cmds = malloc(sizeof(vm_ioctl_cmds));
|
|
if (cmds == NULL)
|
|
return (NULL);
|
|
bcopy(vm_ioctl_cmds, cmds, sizeof(vm_ioctl_cmds));
|
|
return (cmds);
|
|
}
|
|
|
|
*len = nitems(vm_ioctl_cmds);
|
|
return (NULL);
|
|
}
|