b817c837ca
Provide a simplified way to specify GPIO pins for the Atmel port. Add at91 data so we can convert a PIO unit number into a base address. Add at91 standard memory controller helper functions. Generalize AT91 NAND support a bit. Connect NAND for the SAM9260EK eval board, as well as the HotE HL-201. Add nand device and NANDFS into the mix for those at91 boards that have support for it at the moment.
51 lines
2.0 KiB
C
51 lines
2.0 KiB
C
/*-
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* Copyright (C) 2014 Warner Losh.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Atmel at91-family integrated NAND controller driver.
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*
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* Interface to board setup code to set parameters.
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*/
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#ifndef DEV_NAND_NFC_AT91_H
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#define DEV_NAND_NFC_AT91_H 1
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struct at91_nand_params
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{
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uint32_t ale; /* Address for ALE (address) NAND cycles */
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uint32_t cle; /* Address for CLE (command) NAND cycles */
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uint32_t width; /* 8 or 16 bits (specify in bits) */
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uint32_t cs; /* Chip Select NAND is connected to */
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uint32_t rnb_pin; /* GPIO pin # for Read/notBusy */
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uint32_t nce_pin; /* GPIO pin # for CE (active low) */
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};
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void at91_enable_nand(const struct at91_nand_params *);
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#endif /* DEV_NAND_NFC_AT91_H */
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