marius 2c3f86cae9 - Add support for Intel Apollo Lake and Bay Trail eMMC controllers. ... Besides slots always having non-removable media, these HCIs require a custom hardware reset sequence after power-up. - Flesh out the support for Intel Braswell eMMC controllers further. Apart from also requiring said reset code, the timeout clock needs to be hardcoded to 1 MHz for these. Both the special reset and timeout clock handlings are implemented as global sdhci(4) quirks as the same treatment will be necessary for Intel eMMC controllers attached via ACPI (once sdhci(4) grows such a front-end). - In sdhci_init_slot(), use the right capability field for determining the announced bus width based on MMC_CAP_*_BIT_DATA. - Correct inverted sdhci_pci_softc member comments added in r276469. [1] Submitted by: Anton Yuzhaninov [1] MFC after: 5 days		2017-01-09 17:07:13 +00:00
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fsl_sdhci.c	Use the new sdhci_fdt_gpio helper functions to add full support for FDT	2017-01-09 02:04:54 +00:00
sdhci_fdt_gpio.c	Add new helper routines for sdhci bridge drivers that use gpio pins for	2017-01-09 01:54:36 +00:00
sdhci_fdt_gpio.h	Add new helper routines for sdhci bridge drivers that use gpio pins for	2017-01-09 01:54:36 +00:00
sdhci_fdt.c	Fix fallout from r292180 (Dec 2015)... ensure that every driver which has	2016-03-21 00:52:24 +00:00
sdhci_if.m	Add a new sdhci interface method, get_card_present().	2017-01-08 02:32:53 +00:00
sdhci_pci.c	- Add support for Intel Apollo Lake and Bay Trail eMMC controllers.	2017-01-09 17:07:13 +00:00
sdhci.c	- Add support for Intel Apollo Lake and Bay Trail eMMC controllers.	2017-01-09 17:07:13 +00:00
sdhci.h	- Add support for Intel Apollo Lake and Bay Trail eMMC controllers.	2017-01-09 17:07:13 +00:00