freebsd-skq/sys/mips/atheros/uart_bus_ar71xx.c
Ruslan Bukin c214a270f5 Allow setting access-width for UART registers.
This is required for FDT's standard "reg-io-width" property
(similar to "reg-shift" property) found in many DTS files.

This fixes operation on Altera Arria 10 SOC Development Kit,
where standard ns8250 uart allows 4-byte access only.

Reviewed by:	kan, marcel
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D9785
2017-02-27 20:08:42 +00:00

107 lines
3.2 KiB
C

/*-
* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
*/
#include "opt_uart.h"
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <machine/bus.h>
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
#include <dev/uart/uart_bus.h>
#include <mips/atheros/ar71xxreg.h>
#include <mips/atheros/ar71xx_cpudef.h>
#include "uart_if.h"
static int uart_ar71xx_probe(device_t dev);
extern struct uart_class uart_ar71xx_uart_class;
static device_method_t uart_ar71xx_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, uart_ar71xx_probe),
DEVMETHOD(device_attach, uart_bus_attach),
DEVMETHOD(device_detach, uart_bus_detach),
{ 0, 0 }
};
static driver_t uart_ar71xx_driver = {
uart_driver_name,
uart_ar71xx_methods,
sizeof(struct uart_softc),
};
extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
static int
uart_ar71xx_probe(device_t dev)
{
struct uart_softc *sc;
uint64_t freq;
freq = ar71xx_uart_freq();
sc = device_get_softc(dev);
sc->sc_sysdev = SLIST_FIRST(&uart_sysdevs);
sc->sc_class = &uart_ns8250_class;
bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas));
sc->sc_sysdev->bas.regshft = 2;
sc->sc_sysdev->bas.bst = mips_bus_space_generic;
sc->sc_sysdev->bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR) + 3;
sc->sc_bas.regshft = 2;
sc->sc_bas.bst = mips_bus_space_generic;
sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR) + 3;
return (uart_bus_probe(dev, 2, 0, freq, 0, 0));
}
#ifdef EARLY_PRINTF
static void
ar71xx_early_putc(int c)
{
int i;
for (i = 0; i < 1000; i++) {
if (ATH_READ_REG(AR71XX_UART_ADDR + AR71XX_UART_LSR)
& AR71XX_UART_LSR_THRE)
break;
}
ATH_WRITE_REG(AR71XX_UART_ADDR + AR71XX_UART_THR, (c & 0xff));
}
early_putc_t *early_putc = ar71xx_early_putc;
#endif
DRIVER_MODULE(uart, apb, uart_ar71xx_driver, uart_devclass, 0, 0);