0fce92f5c4
and amd64. The optimization is a trivial on recent machines. Reviewed by: -arch (imp, marcel, dfr)
342 lines
7.9 KiB
C
342 lines
7.9 KiB
C
/*-
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* Copyright (c) 1998, 2001 Nicolas Souchu
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* I2C support for the bti2c chipset.
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*
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* From brooktree848.c <fsmp@freefall.org>
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*/
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#include "opt_bktr.h"
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/uio.h>
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#if __FreeBSD_version < 500014
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#include <sys/select.h>
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#else
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#include <sys/selinfo.h>
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#endif
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#if (__FreeBSD_version < 500000)
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#include <machine/clock.h> /* for DELAY */
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#else
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#endif
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#include <machine/bus.h>
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#include <sys/bus.h>
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#include <dev/bktr/ioctl_meteor.h>
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#include <dev/bktr/ioctl_bt848.h> /* extensions to ioctl_meteor.h */
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#include <dev/bktr/bktr_reg.h>
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#include <dev/bktr/bktr_i2c.h>
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#include <dev/smbus/smbconf.h>
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#include <dev/iicbus/iiconf.h>
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#define I2C_DELAY 40
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/* Compilation is void if BKTR_USE_FREEBSD_SMBUS is not
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* defined. This allows bktr owners to have smbus active for there
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* motherboard and still use their bktr without smbus.
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*/
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#if defined(BKTR_USE_FREEBSD_SMBUS)
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#define BTI2C_DEBUG(x) if (bti2c_debug) (x)
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static int bti2c_debug = 0;
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/*
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* Call this to pass the address of the bktr device to the
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* bti2c_i2c layer and initialize all the I2C bus architecture
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*/
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int bt848_i2c_attach(device_t dev)
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{
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struct bktr_softc *bktr_sc = (struct bktr_softc *)device_get_softc(dev);
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struct bktr_i2c_softc *sc = &bktr_sc->i2c_sc;
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sc->smbus = device_add_child(dev, "smbus", -1);
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sc->iicbb = device_add_child(dev, "iicbb", -1);
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if (!sc->iicbb || !sc->smbus)
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return ENXIO;
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bus_generic_attach(dev);
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return (0);
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};
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int bt848_i2c_detach(device_t dev)
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{
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struct bktr_softc *bktr_sc = (struct bktr_softc *)device_get_softc(dev);
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struct bktr_i2c_softc *sc = &bktr_sc->i2c_sc;
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int error = 0;
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if ((error = bus_generic_detach(dev)))
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goto error;
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if (sc->iicbb && (error = device_delete_child(dev, sc->iicbb)))
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goto error;
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if (sc->smbus && (error = device_delete_child(dev, sc->smbus)))
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goto error;
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error:
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return (error);
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}
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int bti2c_smb_callback(device_t dev, int index, caddr_t *data)
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{
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struct bktr_softc *bktr_sc = (struct bktr_softc *)device_get_softc(dev);
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struct bktr_i2c_softc *sc = &bktr_sc->i2c_sc;
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int error = 0;
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/* test each time if we already have/haven't the iicbus
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* to avoid deadlocks
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*/
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switch (index) {
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case SMB_REQUEST_BUS:
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/* XXX test & set */
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if (!sc->bus_owned) {
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sc->bus_owned = 1;
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} else
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error = EWOULDBLOCK;
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break;
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case SMB_RELEASE_BUS:
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/* XXX test & set */
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if (sc->bus_owned) {
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sc->bus_owned = 0;
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} else
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error = EINVAL;
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break;
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default:
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error = EINVAL;
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}
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return (error);
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}
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int bti2c_iic_callback(device_t dev, int index, caddr_t *data)
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{
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struct bktr_softc *bktr_sc = (struct bktr_softc *)device_get_softc(dev);
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struct bktr_i2c_softc *sc = &bktr_sc->i2c_sc;
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int error = 0;
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/* test each time if we already have/haven't the smbus
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* to avoid deadlocks
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*/
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switch (index) {
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case IIC_REQUEST_BUS:
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/* XXX test & set */
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if (!sc->bus_owned) {
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sc->bus_owned = 1;
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} else
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error = EWOULDBLOCK;
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break;
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case IIC_RELEASE_BUS:
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/* XXX test & set */
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if (sc->bus_owned) {
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sc->bus_owned = 0;
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} else
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error = EINVAL;
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break;
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default:
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error = EINVAL;
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}
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return (error);
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}
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int bti2c_iic_reset(device_t dev, u_char speed, u_char addr, u_char * oldaddr)
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{
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if (oldaddr)
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*oldaddr = 0; /* XXX */
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return (IIC_ENOADDR);
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}
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void bti2c_iic_setsda(device_t dev, int val)
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{
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struct bktr_softc *sc = (struct bktr_softc *)device_get_softc(dev);
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int clock;
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clock = INL(sc, BKTR_I2C_DATA_CTL) & 0x2;
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if (val)
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OUTL(sc, BKTR_I2C_DATA_CTL, clock | 1);
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else
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OUTL(sc, BKTR_I2C_DATA_CTL, clock);
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DELAY(I2C_DELAY);
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return;
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}
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void bti2c_iic_setscl(device_t dev, int val)
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{
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struct bktr_softc *sc = (struct bktr_softc *)device_get_softc(dev);
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int data;
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data = INL(sc, BKTR_I2C_DATA_CTL) & 0x1;
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if (val)
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OUTL(sc, BKTR_I2C_DATA_CTL, 0x2 | data);
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else
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OUTL(sc, BKTR_I2C_DATA_CTL, data);
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DELAY(I2C_DELAY);
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return;
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}
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int
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bti2c_iic_getsda(device_t dev)
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{
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struct bktr_softc *sc = (struct bktr_softc *)device_get_softc(dev);
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return (INL(sc,BKTR_I2C_DATA_CTL) & 0x1);
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}
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int
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bti2c_iic_getscl(device_t dev)
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{
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return (0);
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}
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static int
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bti2c_write(struct bktr_softc *sc, u_long data)
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{
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u_long x;
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/* clear status bits */
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OUTL(sc, BKTR_INT_STAT, (BT848_INT_RACK | BT848_INT_I2CDONE));
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BTI2C_DEBUG(printf("w%lx", data));
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/* write the address and data */
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OUTL(sc, BKTR_I2C_DATA_CTL, data);
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/* wait for completion */
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for ( x = 0x7fffffff; x; --x ) { /* safety valve */
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if ( INL(sc, BKTR_INT_STAT) & BT848_INT_I2CDONE )
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break;
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}
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/* check for ACK */
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if ( !x || !( INL(sc, BKTR_INT_STAT) & BT848_INT_RACK) ) {
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BTI2C_DEBUG(printf("%c%c", (!x)?'+':'-',
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(!( INL(sc, BKTR_INT_STAT) & BT848_INT_RACK))?'+':'-'));
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return (SMB_ENOACK);
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}
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BTI2C_DEBUG(printf("+"));
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/* return OK */
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return( 0 );
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}
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int
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bti2c_smb_writeb(device_t dev, u_char slave, char cmd, char byte)
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{
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struct bktr_softc *sc = (struct bktr_softc *)device_get_softc(dev);
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u_long data;
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data = ((slave & 0xff) << 24) | ((byte & 0xff) << 16) | (u_char)cmd;
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return (bti2c_write(sc, data));
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}
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/*
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* byte1 becomes low byte of word
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* byte2 becomes high byte of word
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*/
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int
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bti2c_smb_writew(device_t dev, u_char slave, char cmd, short word)
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{
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struct bktr_softc *sc = (struct bktr_softc *)device_get_softc(dev);
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u_long data;
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char low, high;
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low = (char)(word & 0xff);
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high = (char)((word & 0xff00) >> 8);
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data = ((slave & 0xff) << 24) | ((low & 0xff) << 16) |
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((high & 0xff) << 8) | BT848_DATA_CTL_I2CW3B | (u_char)cmd;
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return (bti2c_write(sc, data));
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}
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/*
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* The Bt878 and Bt879 differed on the treatment of i2c commands
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*/
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int
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bti2c_smb_readb(device_t dev, u_char slave, char cmd, char *byte)
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{
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struct bktr_softc *sc = (struct bktr_softc *)device_get_softc(dev);
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u_long x;
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/* clear status bits */
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OUTL(sc,BKTR_INT_STAT, (BT848_INT_RACK | BT848_INT_I2CDONE));
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OUTL(sc,BKTR_I2C_DATA_CTL, ((slave & 0xff) << 24) | (u_char)cmd);;
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BTI2C_DEBUG(printf("r%lx/", (u_long)(((slave & 0xff) << 24) | (u_char)cmd)));
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/* wait for completion */
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for ( x = 0x7fffffff; x; --x ) { /* safety valve */
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if ( INL(sc,BKTR_INT_STAT) & BT848_INT_I2CDONE )
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break;
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}
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/* check for ACK */
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if ( !x || !(INL(sc,BKTR_INT_STAT) & BT848_INT_RACK) ) {
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BTI2C_DEBUG(printf("r%c%c", (!x)?'+':'-',
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(!( INL(sc,BKTR_INT_STAT) & BT848_INT_RACK))?'+':'-'));
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return (SMB_ENOACK);
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}
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*byte = (char)((INL(sc,BKTR_I2C_DATA_CTL) >> 8) & 0xff);
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BTI2C_DEBUG(printf("r%x+", *byte));
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return (0);
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}
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#endif /* defined(BKTR_USE_FREEBSD_SMBUS) */
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