468 lines
11 KiB
C
468 lines
11 KiB
C
/*
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* Copyright (c) 2013-2016 Qlogic Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* File: ql_minidump.h
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*
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* $FreeBSD$
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*/
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#ifndef _QL_MINIDUMP_H_
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#define _QL_MINIDUMP_H_
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#define QL_DBG_STATE_ARRAY_LEN 16
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#define QL_DBG_CAP_SIZE_ARRAY_LEN 8
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#define QL_NO_OF_OCM_WINDOWS 16
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typedef struct ql_mdump_tmplt_hdr {
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uint32_t entry_type ;
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uint32_t first_entry_offset ;
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uint32_t size_of_template ;
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uint32_t recommended_capture_mask;
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uint32_t num_of_entries ;
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uint32_t version ;
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uint32_t driver_timestamp ;
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uint32_t checksum ;
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uint32_t driver_capture_mask ;
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uint32_t driver_info_word2 ;
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uint32_t driver_info_word3 ;
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uint32_t driver_info_word4 ;
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uint32_t saved_state_array[QL_DBG_STATE_ARRAY_LEN] ;
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uint32_t capture_size_array[QL_DBG_CAP_SIZE_ARRAY_LEN] ;
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uint32_t ocm_window_array[QL_NO_OF_OCM_WINDOWS] ;
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} ql_minidump_template_hdr_t ;
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/*
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* MIU AGENT ADDRESSES.
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*/
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#define MD_TA_CTL_ENABLE 0x2
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#define MD_TA_CTL_START 0x1
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#define MD_TA_CTL_BUSY 0x8
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#define MD_TA_CTL_CHECK 1000
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#define MD_MIU_TEST_AGT_CTRL 0x41000090
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#define MD_MIU_TEST_AGT_ADDR_LO 0x41000094
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#define MD_MIU_TEST_AGT_ADDR_HI 0x41000098
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#define MD_MIU_TEST_AGT_RDDATA_0_31 0x410000A8
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#define MD_MIU_TEST_AGT_RDDATA_32_63 0x410000AC
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#define MD_MIU_TEST_AGT_RDDATA_64_95 0x410000B8
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#define MD_MIU_TEST_AGT_RDDATA_96_127 0x410000BC
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#define MD_MIU_TEST_AGT_WRDATA_0_31 0x410000A0
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#define MD_MIU_TEST_AGT_WRDATA_32_63 0x410000A4
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#define MD_MIU_TEST_AGT_WRDATA_64_95 0x410000B0
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#define MD_MIU_TEST_AGT_WRDATA_96_127 0x410000B4
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/*
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* ROM Read Address
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*/
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#define MD_DIRECT_ROM_WINDOW 0x42110030
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#define MD_DIRECT_ROM_READ_BASE 0x42150000
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/*
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* Entry Type Defines
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*/
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#define RDNOP 0
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#define RDCRB 1
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#define RDMUX 2
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#define QUEUE 3
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#define BOARD 4
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#define RDOCM 6
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#define L1DAT 11
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#define L1INS 12
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#define L2DTG 21
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#define L2ITG 22
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#define L2DAT 23
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#define L2INS 24
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#define POLLRD 35
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#define RDMUX2 36
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#define POLLRDMWR 37
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#define RDROM 71
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#define RDMEM 72
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#define CNTRL 98
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#define TLHDR 99
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#define RDEND 255
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/*
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* Index of State Table. The Template header maintains
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* an array of 8 (0..7) words that is used to store some
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* "State Information" from the board.
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*/
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#define QL_PCIE_FUNC_INDX 0
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#define QL_CLK_STATE_INDX 1
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#define QL_SRE_STATE_INDX 2
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#define QL_OCM0_ADDR_INDX 3
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#define QL_REVID_STATE_INDX 4
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#define QL_MAJVER_STATE_INDX 5
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#define QL_MINVER_STATE_INDX 6
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#define QL_SUBVER_STATE_INDX 7
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/*
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* Opcodes for Control Entries.
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* These Flags are bit fields.
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*/
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#define QL_DBG_OPCODE_WR 0x01
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#define QL_DBG_OPCODE_RW 0x02
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#define QL_DBG_OPCODE_AND 0x04
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#define QL_DBG_OPCODE_OR 0x08
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#define QL_DBG_OPCODE_POLL 0x10
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#define QL_DBG_OPCODE_RDSTATE 0x20
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#define QL_DBG_OPCODE_WRSTATE 0x40
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#define QL_DBG_OPCODE_MDSTATE 0x80
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typedef struct ql_minidump_entry_hdr_s {
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uint32_t entry_type ;
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uint32_t entry_size ;
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uint32_t entry_capture_size ;
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union {
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struct {
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uint8_t entry_capture_mask ;
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uint8_t entry_code ;
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uint8_t driver_code ;
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uint8_t driver_flags ;
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};
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uint32_t entry_ctrl_word ;
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};
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} ql_minidump_entry_hdr_t ;
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/*
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* Driver Flags
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*/
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#define QL_DBG_SKIPPED_FLAG 0x80 /* driver skipped this entry */
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#define QL_DBG_SIZE_ERR_FLAG 0x40 /* entry size vs capture size mismatch*/
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/*
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* Generic Entry Including Header
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*/
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typedef struct ql_minidump_entry_s {
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ql_minidump_entry_hdr_t hdr ;
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uint32_t entry_data00 ;
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uint32_t entry_data01 ;
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uint32_t entry_data02 ;
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uint32_t entry_data03 ;
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uint32_t entry_data04 ;
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uint32_t entry_data05 ;
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uint32_t entry_data06 ;
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uint32_t entry_data07 ;
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} ql_minidump_entry_t;
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/*
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* Read CRB Entry Header
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*/
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typedef struct ql_minidump_entry_rdcrb_s {
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ql_minidump_entry_hdr_t h;
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uint32_t addr ;
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union {
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struct {
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uint8_t addr_stride ;
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uint8_t rsvd_0;
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uint16_t rsvd_1 ;
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} ;
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uint32_t addr_cntrl ;
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} ;
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uint32_t data_size ;
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uint32_t op_count;
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uint32_t rsvd_2 ;
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uint32_t rsvd_3 ;
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uint32_t rsvd_4 ;
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uint32_t rsvd_5 ;
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} ql_minidump_entry_rdcrb_t ;
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/*
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* Cache Entry Header
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*/
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typedef struct ql_minidump_entry_cache_s {
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ql_minidump_entry_hdr_t h;
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uint32_t tag_reg_addr ;
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union {
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struct {
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uint16_t tag_value_stride ;
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uint16_t init_tag_value ;
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} ;
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uint32_t select_addr_cntrl ;
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} ;
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uint32_t data_size ;
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uint32_t op_count;
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uint32_t control_addr ;
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union {
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struct {
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uint16_t write_value ;
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uint8_t poll_mask ;
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uint8_t poll_wait ;
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};
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uint32_t control_value ;
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} ;
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uint32_t read_addr ;
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union {
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struct {
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uint8_t read_addr_stride ;
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uint8_t read_addr_cnt ;
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uint16_t rsvd_1 ;
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} ;
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uint32_t read_addr_cntrl ;
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} ;
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} ql_minidump_entry_cache_t ;
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/*
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* Read OCM Entry Header
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*/
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typedef struct ql_minidump_entry_rdocm_s {
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ql_minidump_entry_hdr_t h;
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uint32_t rsvd_0 ;
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uint32_t rsvd_1 ;
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uint32_t data_size ;
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uint32_t op_count;
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uint32_t rsvd_2 ;
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uint32_t rsvd_3 ;
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uint32_t read_addr ;
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uint32_t read_addr_stride ;
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} ql_minidump_entry_rdocm_t ;
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/*
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* Read MEM Entry Header
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*/
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typedef struct ql_minidump_entry_rdmem_s {
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ql_minidump_entry_hdr_t h;
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uint32_t rsvd_0[6] ;
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uint32_t read_addr ;
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uint32_t read_data_size ;
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} ql_minidump_entry_rdmem_t ;
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/*
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* Read ROM Entry Header
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*/
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typedef struct ql_minidump_entry_rdrom_s {
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ql_minidump_entry_hdr_t h;
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uint32_t rsvd_0[6] ;
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uint32_t read_addr ;
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uint32_t read_data_size ;
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} ql_minidump_entry_rdrom_t ;
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/*
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* Read MUX Entry Header
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*/
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typedef struct ql_minidump_entry_mux_s {
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ql_minidump_entry_hdr_t h;
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uint32_t select_addr ;
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union {
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struct {
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uint32_t rsvd_0 ;
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} ;
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uint32_t select_addr_cntrl ;
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} ;
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uint32_t data_size ;
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uint32_t op_count;
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uint32_t select_value ;
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uint32_t select_value_stride ;
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uint32_t read_addr ;
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uint32_t rsvd_1 ;
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} ql_minidump_entry_mux_t ;
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/*
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* Read MUX2 Entry Header
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*/
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typedef struct ql_minidump_entry_mux2_s {
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ql_minidump_entry_hdr_t h;
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uint32_t select_addr_1;
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uint32_t select_addr_2;
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uint32_t select_value_1;
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uint32_t select_value_2;
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uint32_t select_value_count;
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uint32_t select_value_mask;
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uint32_t read_addr;
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union {
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struct {
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uint8_t select_value_stride;
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uint8_t data_size;
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uint8_t reserved_0;
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uint8_t reserved_1;
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};
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uint32_t select_addr_value_cntrl;
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};
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} ql_minidump_entry_mux2_t;
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/*
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* Read QUEUE Entry Header
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*/
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typedef struct ql_minidump_entry_queue_s {
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ql_minidump_entry_hdr_t h;
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uint32_t select_addr ;
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union {
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struct {
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uint16_t queue_id_stride ;
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uint16_t rsvd_0 ;
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} ;
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uint32_t select_addr_cntrl ;
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} ;
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uint32_t data_size ;
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uint32_t op_count ;
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uint32_t rsvd_1 ;
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uint32_t rsvd_2 ;
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uint32_t read_addr ;
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union {
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struct {
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uint8_t read_addr_stride ;
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uint8_t read_addr_cnt ;
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uint16_t rsvd_3 ;
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} ;
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uint32_t read_addr_cntrl ;
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} ;
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} ql_minidump_entry_queue_t ;
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/*
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* Control Entry Header
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*/
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typedef struct ql_minidump_entry_cntrl_s {
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ql_minidump_entry_hdr_t h;
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uint32_t addr ;
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union {
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struct {
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uint8_t addr_stride ;
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uint8_t state_index_a ;
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uint16_t poll_timeout ;
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} ;
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uint32_t addr_cntrl ;
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} ;
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uint32_t data_size ;
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uint32_t op_count;
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union {
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struct {
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uint8_t opcode ;
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uint8_t state_index_v ;
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uint8_t shl ;
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uint8_t shr ;
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} ;
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uint32_t control_value ;
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} ;
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uint32_t value_1 ;
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uint32_t value_2 ;
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uint32_t value_3 ;
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} ql_minidump_entry_cntrl_t ;
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/*
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* Read with poll.
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*/
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typedef struct ql_minidump_entry_rdcrb_with_poll_s {
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ql_minidump_entry_hdr_t h;
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uint32_t select_addr;
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uint32_t read_addr;
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uint32_t select_value;
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union {
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struct {
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uint16_t select_value_stride;
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uint16_t op_count;
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};
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uint32_t select_value_cntrl;
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};
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uint32_t poll;
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uint32_t mask;
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uint32_t data_size;
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uint32_t rsvd_0;
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} ql_minidump_entry_pollrd_t;
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/*
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* Read_Modify_Write with poll.
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*/
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typedef struct ql_minidump_entry_rd_modify_wr_with_poll_s {
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ql_minidump_entry_hdr_t h;
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uint32_t addr_1;
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uint32_t addr_2;
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uint32_t value_1;
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uint32_t value_2;
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uint32_t poll;
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uint32_t mask;
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uint32_t modify_mask;
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uint32_t data_size;
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} ql_minidump_entry_rd_modify_wr_with_poll_t;
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#endif /* #ifndef _QL_MINIDUMP_H_ */
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