ebf95d96d9
PowerISA 3.0 makes several changes to not only the format of the HPT but also the behavior surrounding it. For instance, TLBIE no longer requires serialization. Removing this lock cuts buildworld time in half on a 18-core/72-thread POWER9 system, demonstrating that this lock is highly contended on such a system. There was odd behavior observed trying to make this change in a backwards-compatible manner in moea64_native.c, so the best option was to fully split it, and largely revert the original changes adding POWER9 support to the original file. Suggested by: nwhitehorn
123 lines
3.8 KiB
C
123 lines
3.8 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2005 Peter Grehan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_MMUVAR_H_
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#define _MACHINE_MMUVAR_H_
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/*
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* A PowerPC MMU implementation is declared with a kernel object and
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* an associated method table. The MMU_DEF macro is used to declare
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* the class, and also links it to the global MMU class list.
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*
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* e.g.
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*
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* static mmu_method_t ppc8xx_methods[] = {
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* MMUMETHOD(mmu_change_wiring, ppc8xx_mmu_change_wiring),
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* MMUMETHOD(mmu_clear_modify, ppc8xx_mmu_clear_modify),
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* MMUMETHOD(mmu_clear_reference, ppc8xx_mmu_clear_reference),
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* ...
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* MMUMETHOD(mmu_dev_direct_mapped, ppc8xx_mmu_dev_direct_mapped),
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* { 0, 0 }
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* };
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*
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* MMU_DEF(ppc8xx, MMU_TYPE_8xx, ppc8xx_methods, sizeof(ppc8xx_mmu_softc));
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*
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* A single level of inheritance is supported in a similar fashion to
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* kobj inheritance e.g.
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*
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* MMU_DEF_1(ppc860c, MMU_TYPE_860c, ppc860c_methods, 0, ppc8xx);
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*/
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#include <sys/kobj.h>
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struct mmu_kobj {
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/*
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* An MMU instance is a kernel object
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*/
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KOBJ_FIELDS;
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/*
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* Utility elements that an instance may use
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*/
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struct mtx mmu_mtx; /* available for instance use */
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void *mmu_iptr; /* instance data pointer */
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/*
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* Opaque data that can be overlaid with an instance-private
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* structure. MMU code can test that this is large enough at
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* compile time with a sizeof() test againt it's softc. There
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* is also a run-time test when the MMU kernel object is
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* registered.
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*/
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#define MMU_OPAQUESZ 64
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u_int mmu_opaque[MMU_OPAQUESZ];
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};
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typedef struct mmu_kobj *mmu_t;
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typedef struct kobj_class mmu_def_t;
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#define mmu_method_t kobj_method_t
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#define MMUMETHOD KOBJMETHOD
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#define MMU_DEF(name, ident, methods, size) \
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\
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mmu_def_t name = { \
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ident, methods, size, NULL \
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}; \
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DATA_SET(mmu_set, name)
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#define MMU_DEF_INHERIT(name, ident, methods, size, base1) \
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\
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static kobj_class_t name ## _baseclasses[] = \
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{ &base1, NULL }; \
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mmu_def_t name = { \
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ident, methods, size, name ## _baseclasses \
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}; \
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DATA_SET(mmu_set, name)
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#if 0
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mmu_def_t name = { \
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ident, methods, size, name ## _baseclasses \
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};
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DATA_SET(mmu_set, name)
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#endif
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/*
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* Known MMU names
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*/
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#define MMU_TYPE_BOOKE "mmu_booke" /* Book-E MMU specification */
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#define MMU_TYPE_OEA "mmu_oea" /* 32-bit OEA */
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#define MMU_TYPE_G5 "mmu_g5" /* 64-bit bridge (ibm 970) */
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#define MMU_TYPE_P9H "mmu_p9h" /* 64-bit native ISA 3.0 (POWER9) hash */
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#define MMU_TYPE_8xx "mmu_8xx" /* 8xx quicc TLB */
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#endif /* _MACHINE_MMUVAR_H_ */
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