e282774be5
This is an import of the reworked LEDE dts files. Besides other things they make it easier for us to reuse. The only diffs left are for the following SoCs: MT7620A (fbsd-mt7620a.dtsi) MT7621 (fbsd-mt7621.dtsi) MT7628 (fbsd-mt7628an.dtsi) RT3883 (fbsd-rt3883.dtsi) So we include the fbsd-*.dtsi files at the end of the original LEDE dtsi files, using '#include "fbsd-xxxx.dtsi"'. For example, for MT7621, the LEDE dtsi file is mt7621.dtsi. At the end of it we add: #include "fbsd-mt7621.dtsi" Approved by: adrian (mentor) Obtained from: LEDE project Sponsored by: Smartcom - Bulgaria AD Differential Revision: https://reviews.freebsd.org/D6394
151 lines
2.2 KiB
Plaintext
151 lines
2.2 KiB
Plaintext
/dts-v1/;
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#include "rt3883.dtsi"
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/ {
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compatible = "CY-SWR1100", "ralink,rt3883-soc";
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model = "Samsung CY-SWR1100";
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nor-flash@1c000000 {
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compatible = "cfi-flash";
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reg = <0x1c000000 0x800000>;
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bank-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "uboot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "uboot-env";
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reg = <0x30000 0x4000>;
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read-only;
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};
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factory: partition@34000 {
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label = "factory";
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reg = <0x34000 0x4000>;
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read-only;
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};
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partition@38000 {
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label = "nvram";
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reg = <0x38000 0x8000>;
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read-only;
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};
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partition@40000 {
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label = "devdata";
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reg = <0x40000 0x10000>;
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};
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partition@50000 {
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label = "firmware";
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reg = <0x50000 0x7b0000>;
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};
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};
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rtl8367 {
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compatible = "realtek,rtl8367";
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gpio-sda = <&gpio0 1 0>;
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gpio-sck = <&gpio0 2 0>;
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realtek,extif0 = <1 0 1 1 1 1 1 1 2>;
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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reset {
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label = "reset";
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gpios = <&gpio0 6 1>;
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linux,code = <0x198>;
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};
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wps {
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label = "wps";
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gpios = <&gpio0 3 1>;
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linux,code = <0x211>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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wps {
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label = "cy-swr1100:blue:wps";
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gpios = <&gpio0 0 1>;
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};
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usb {
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label = "cy-swr1100:blue:usb";
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gpios = <&gpio1 1 1>;
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};
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};
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};
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&gpio1 {
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status = "okay";
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "i2c", "spi";
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ralink,function = "gpio";
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};
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};
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};
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ðernet {
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port@0 {
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mediatek,fixed-link = <1000 1 1 1>;
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phy-mode = "rgmii";
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};
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};
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&pci {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pci_pins>;
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pci_pins: pci {
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pci {
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ralink,group = "pci";
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ralink,function = "pci-fnc";
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};
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};
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host-bridge {
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pci-bridge@1 {
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status = "okay";
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wmac@0,0 {
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ralink,5ghz = <0>;
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compatible = "ralink,rt2880-pci", "pciclass060400", "pciclass0604";
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reg = < 0x10000 0 0 0 0 >;
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ralink,eeprom = "rt2x00pci_1_0.eeprom";
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};
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};
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};
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};
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&wmac {
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status = "okay";
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ralink,2ghz = <0>;
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ralink,mtd-eeprom = <&factory 0>;
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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