neel 32e0378b35 AMD processors that have the SVM decode assist capability will store the ... instruction bytes in the VMCB on a nested page fault. This is useful because it saves having to walk the guest page tables to fetch the instruction. vie_init() now takes two additional parameters 'inst_bytes' and 'inst_len' that map directly to 'vie->inst[]' and 'vie->num_valid'. The instruction emulation handler skips calling 'vmm_fetch_instruction()' if 'vie->num_valid' is non-zero. The use of this capability can be turned off by setting the sysctl/tunable 'hw.vmm.svm.disable_npf_assist' to '1'. Reviewed by: Anish Gupta (akgupt3@gmail.com) Discussed with: grehan		2014-09-13 22:16:40 +00:00
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acpica	don't set CR4 PSE bit on amd64	2014-07-23 15:53:29 +00:00
amd64	IFC @r269962	2014-09-02 04:22:42 +00:00
conf	Add vt(4) devices and options to NOTES	2014-07-01 00:22:54 +00:00
ia32	x86: Allow users to change PSL_RF via ptrace(PT_SETREGS...)	2013-11-14 15:37:20 +00:00
include	AMD processors that have the SVM decode assist capability will store the	2014-09-13 22:16:40 +00:00
linux32	Revert r266925 as it can lead to instant panic at fexecve():	2014-06-17 05:29:18 +00:00
pci	Pull in r267961 and r267973 again. Fix for issues reported will follow.	2014-06-28 03:56:17 +00:00
vmm	AMD processors that have the SVM decode assist capability will store the	2014-09-13 22:16:40 +00:00
Makefile